JP4769975B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP4769975B2
JP4769975B2 JP2006091171A JP2006091171A JP4769975B2 JP 4769975 B2 JP4769975 B2 JP 4769975B2 JP 2006091171 A JP2006091171 A JP 2006091171A JP 2006091171 A JP2006091171 A JP 2006091171A JP 4769975 B2 JP4769975 B2 JP 4769975B2
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Japan
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semiconductor device
protective film
dicing sheet
semiconductor
manufacturing
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Expired - Fee Related
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JP2006091171A
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English (en)
Japanese (ja)
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JP2007266420A5 (enExample
JP2007266420A (ja
Inventor
光雄 梅本
英章 吉見
和美 恩田
和己 堀中
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On Semiconductor Trading Ltd
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On Semiconductor Trading Ltd
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Publication of JP2007266420A5 publication Critical patent/JP2007266420A5/ja
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Dicing (AREA)
JP2006091171A 2006-03-29 2006-03-29 半導体装置の製造方法 Expired - Fee Related JP4769975B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006091171A JP4769975B2 (ja) 2006-03-29 2006-03-29 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006091171A JP4769975B2 (ja) 2006-03-29 2006-03-29 半導体装置の製造方法

Publications (3)

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JP2007266420A JP2007266420A (ja) 2007-10-11
JP2007266420A5 JP2007266420A5 (enExample) 2009-04-09
JP4769975B2 true JP4769975B2 (ja) 2011-09-07

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JP2006091171A Expired - Fee Related JP4769975B2 (ja) 2006-03-29 2006-03-29 半導体装置の製造方法

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JP (1) JP4769975B2 (enExample)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010153607A (ja) * 2008-12-25 2010-07-08 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP5640050B2 (ja) * 2009-01-30 2014-12-10 日東電工株式会社 半導体装置の製造方法
JP5805367B2 (ja) * 2009-01-30 2015-11-04 日東電工株式会社 ダイシングテープ一体型ウエハ裏面保護フィルム
JP5976857B2 (ja) * 2009-01-30 2016-08-24 日東電工株式会社 ダイシングテープ一体型ウエハ裏面保護フィルム
JP5456440B2 (ja) 2009-01-30 2014-03-26 日東電工株式会社 ダイシングテープ一体型ウエハ裏面保護フィルム
JP5506209B2 (ja) * 2009-02-26 2014-05-28 三菱樹脂株式会社 離型フィルム
JP5885325B2 (ja) * 2009-05-29 2016-03-15 日東電工株式会社 ダイシングテープ一体型半導体裏面用フィルム
CN101924056A (zh) 2009-06-15 2010-12-22 日东电工株式会社 半导体背面用切割带集成膜
CN101924055A (zh) * 2009-06-15 2010-12-22 日东电工株式会社 半导体背面用切割带集成膜
JP5501938B2 (ja) 2009-12-24 2014-05-28 日東電工株式会社 フリップチップ型半導体裏面用フィルム
JP5681374B2 (ja) * 2010-04-19 2015-03-04 日東電工株式会社 ダイシングテープ一体型半導体裏面用フィルム
JP5439264B2 (ja) 2010-04-19 2014-03-12 日東電工株式会社 ダイシングテープ一体型半導体裏面用フィルム
JP2011253879A (ja) * 2010-06-01 2011-12-15 Nec Corp 半導体素子及び半導体内蔵基板
JP5249290B2 (ja) * 2010-07-20 2013-07-31 日東電工株式会社 フリップチップ型半導体裏面用フィルム、ダイシングテープ一体型半導体裏面用フィルム、半導体装置の製造方法、及び、フリップチップ型半導体装置
JP5048815B2 (ja) * 2010-07-20 2012-10-17 日東電工株式会社 フリップチップ型半導体裏面用フィルム、及び、ダイシングテープ一体型半導体裏面用フィルム
JP5641641B2 (ja) * 2010-07-29 2014-12-17 日東電工株式会社 ダイシングテープ一体型半導体裏面用フィルム及び半導体装置の製造方法
JP2012033637A (ja) 2010-07-29 2012-02-16 Nitto Denko Corp ダイシングテープ一体型半導体裏面用フィルム及び半導体装置の製造方法
CN104541360B (zh) * 2012-08-23 2019-10-01 琳得科株式会社 带保护膜形成层的切割片和芯片的制造方法
JP2014123743A (ja) * 2013-12-27 2014-07-03 Nitto Denko Corp ダイシングテープ一体型半導体裏面用フィルム
JP5917577B2 (ja) * 2014-01-22 2016-05-18 日東電工株式会社 ダイシングテープ一体型半導体裏面用フィルム及び半導体装置の製造方法
JP2020102553A (ja) * 2018-12-21 2020-07-02 日東電工株式会社 半導体背面密着フィルム
WO2019131852A1 (ja) * 2017-12-28 2019-07-04 日東電工株式会社 半導体背面密着フィルム
JP2020035820A (ja) * 2018-08-28 2020-03-05 太陽誘電株式会社 モジュールおよびその製造方法
CN113260480A (zh) 2021-03-31 2021-08-13 长江存储科技有限责任公司 用于切割半导体结构的激光切割系统及方法
WO2022205082A1 (en) 2021-03-31 2022-10-06 Yangtze Memory Technologies Co., Ltd. Laser system for dicing semiconductor structure and operation method thereof

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1302938C (zh) * 2001-10-09 2007-03-07 皇家飞利浦电子股份有限公司 电子器件制作方法和用所述方法制成的电子器件
JP3949983B2 (ja) * 2002-03-18 2007-07-25 旭化成ケミカルズ株式会社 樹脂成形品表面への黒色のレーザーマーキング法、及び成形品表面への導電部形成法、並びに該導電部の使用方法
JP2004063551A (ja) * 2002-07-25 2004-02-26 Hitachi Chem Co Ltd 半導体素子表面保護用フィルム及び半導体素子ユニット
JP2005203696A (ja) * 2004-01-19 2005-07-28 Casio Micronics Co Ltd 半導体装置、その製造装置、および半導体装置へのマーキング方法
JP2005310889A (ja) * 2004-04-19 2005-11-04 Seiko Epson Corp 半導体装置の製造方法、半導体装置及び識別情報付きウェハ

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