JP4714026B2 - 電子部品実装装置、電子部品実装方法及び電子部品装置 - Google Patents

電子部品実装装置、電子部品実装方法及び電子部品装置 Download PDF

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Publication number
JP4714026B2
JP4714026B2 JP2006002671A JP2006002671A JP4714026B2 JP 4714026 B2 JP4714026 B2 JP 4714026B2 JP 2006002671 A JP2006002671 A JP 2006002671A JP 2006002671 A JP2006002671 A JP 2006002671A JP 4714026 B2 JP4714026 B2 JP 4714026B2
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Prior art keywords
mounting
adhesive
substrate
electronic component
reinforcing plate
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JP2006002671A
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Japanese (ja)
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JP2007184485A5 (enExample
JP2007184485A (ja
Inventor
宏一郎 中村
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Toshiba Corp
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Toshiba Corp
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Priority to JP2006002671A priority Critical patent/JP4714026B2/ja
Priority to SG200608999-9A priority patent/SG134221A1/en
Priority to US11/645,702 priority patent/US7748113B2/en
Priority to EP07000029A priority patent/EP1806962B1/en
Priority to CN2007100021120A priority patent/CN101001519B/zh
Publication of JP2007184485A publication Critical patent/JP2007184485A/ja
Publication of JP2007184485A5 publication Critical patent/JP2007184485A5/ja
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Publication of JP4714026B2 publication Critical patent/JP4714026B2/ja
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • H05K13/046—Surface mounting
    • H05K13/0469—Surface mounting by applying a glue or viscous material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
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    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
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    • H01—ELECTRIC ELEMENTS
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    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01—ELECTRIC ELEMENTS
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L2224/838—Bonding techniques
    • H—ELECTRICITY
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    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
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    • H01L2224/90—Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
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    • H01L24/90—Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
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    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49133—Assembling to base an electrical component, e.g., capacitor, etc. with component orienting
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/49002—Electrical device making
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    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/5313—Means to assemble electrical device
    • Y10T29/53174—Means to fasten electrical component to wiring board, base, or substrate
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y10T29/53—Means to assemble or disassemble
    • Y10T29/5313—Means to assemble electrical device
    • Y10T29/53187—Multiple station assembly apparatus

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Supply And Installment Of Electrical Components (AREA)
  • Die Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
JP2006002671A 2006-01-10 2006-01-10 電子部品実装装置、電子部品実装方法及び電子部品装置 Active JP4714026B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2006002671A JP4714026B2 (ja) 2006-01-10 2006-01-10 電子部品実装装置、電子部品実装方法及び電子部品装置
SG200608999-9A SG134221A1 (en) 2006-01-10 2006-12-26 Electronic component mounting apparatus and electronic component mounting method
US11/645,702 US7748113B2 (en) 2006-01-10 2006-12-27 Electronic component mounting method
EP07000029A EP1806962B1 (en) 2006-01-10 2007-01-02 Electronic component mounting apparatus and electronic component mounting method
CN2007100021120A CN101001519B (zh) 2006-01-10 2007-01-10 电子部件安装设备和电子部件安装方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006002671A JP4714026B2 (ja) 2006-01-10 2006-01-10 電子部品実装装置、電子部品実装方法及び電子部品装置

Publications (3)

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JP2007184485A JP2007184485A (ja) 2007-07-19
JP2007184485A5 JP2007184485A5 (enExample) 2010-11-04
JP4714026B2 true JP4714026B2 (ja) 2011-06-29

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US (1) US7748113B2 (enExample)
EP (1) EP1806962B1 (enExample)
JP (1) JP4714026B2 (enExample)
CN (1) CN101001519B (enExample)
SG (1) SG134221A1 (enExample)

Families Citing this family (13)

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JP4819602B2 (ja) * 2006-07-05 2011-11-24 パナソニック株式会社 Ａｃｆ貼付装置及びａｃｆ貼付方法
WO2008015988A1 (en) * 2006-07-31 2008-02-07 Panasonic Corporation Component mounting condition determining method
US8156642B2 (en) * 2007-04-03 2012-04-17 Panasonic Corporation Component mounting method
US7923056B2 (en) 2007-06-01 2011-04-12 Illinois Tool Works Inc. Method and apparatus for dispensing material on a substrate
US7833572B2 (en) * 2007-06-01 2010-11-16 Illinois Tool Works, Inc. Method and apparatus for dispensing a viscous material on a substrate
CN101842000B (zh) * 2009-03-19 2014-04-30 鸿富锦精密工业（深圳）有限公司 贴附装置及使用该贴附装置的贴附方法
JP5440483B2 (ja) * 2010-12-09 2014-03-12 パナソニック株式会社 電子部品実装システムおよび電子部品実装方法
US20140093638A1 (en) * 2012-09-28 2014-04-03 Jonathan Joel Bloom Method of dispensing material based on angular locate feature
JP6450923B2 (ja) * 2013-12-20 2019-01-16 パナソニックＩｐマネジメント株式会社 電子部品実装システムおよび電子部品実装方法ならびに電子部品実装装置
US9815081B2 (en) 2015-02-24 2017-11-14 Illinois Tool Works Inc. Method of calibrating a dispenser
CN108019403A (zh) * 2016-10-31 2018-05-11 富鼎电子科技(嘉善)有限公司 组装装置
CN110586386A (zh) * 2019-09-10 2019-12-20 浙江诺派建筑系统有限公司 一种复合板喷胶工艺
CN110831348B (zh) * 2019-11-24 2021-10-08 湖南凯通电子有限公司 热敏电阻粘接机

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Publication number Priority date Publication date Assignee Title
US5602A (en) 1848-05-30 James p
JP3116509B2 (ja) * 1992-01-29 2000-12-11 松下電器産業株式会社 ヒートシンクのボンディング装置およびボンディング方法
US5811317A (en) * 1995-08-25 1998-09-22 Texas Instruments Incorporated Process for reflow bonding a semiconductor die to a substrate and the product produced by the product
JP2806348B2 (ja) * 1996-03-08 1998-09-30 日本電気株式会社 半導体素子の実装構造及びその製造方法
JP2000137781A (ja) * 1998-10-30 2000-05-16 Hitachi Ltd カード型電子回路基板及びその製造方法
JP4075204B2 (ja) * 1999-04-09 2008-04-16 松下電器産業株式会社 積層型半導体装置
JP2001028381A (ja) 1999-07-14 2001-01-30 Sony Corp 実装方法及び実装装置
JP3691995B2 (ja) * 1999-11-12 2005-09-07 新光電気工業株式会社 半導体パッケージ及びその製造方法並びに半導体装置
JP4128319B2 (ja) * 1999-12-24 2008-07-30 株式会社新川 マルチチップボンディング方法及び装置
FR2803413A1 (fr) 1999-12-30 2001-07-06 Schlumberger Systems & Service Element de carte a circuit integre monte en flip-chip
JP3531586B2 (ja) * 2000-06-12 2004-05-31 松下電器産業株式会社 表示パネルの組立装置および組立方法
KR100676353B1 (ko) * 2000-10-26 2007-01-31 산요덴키가부시키가이샤 혼성 집적 회로 장치의 제조 방법
JP3988878B2 (ja) * 2001-03-02 2007-10-10 東レエンジニアリング株式会社 チップ実装方法およびその装置
US6874225B2 (en) * 2001-12-18 2005-04-05 Matsushita Electric Industrial Co., Ltd. Electronic component mounting apparatus
JP4045838B2 (ja) * 2002-04-12 2008-02-13 松下電器産業株式会社 部品装着管理方法
DE10245398B3 (de) * 2002-09-28 2004-06-03 Mühlbauer Ag Vorrichtung und Verfahren zur Aufbringung von Halbleiterchips auf Trägern
JP4104062B2 (ja) * 2002-12-13 2008-06-18 松下電器産業株式会社 電子部品実装装置
ATE396607T1 (de) 2003-05-02 2008-06-15 Ericsson Ab Klebeverfahren und -vorrichtung
JP4200090B2 (ja) * 2003-12-18 2008-12-24 新光電気工業株式会社 半導体装置の製造方法
US7023089B1 (en) * 2004-03-31 2006-04-04 Intel Corporation Low temperature packaging apparatus and method

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US7748113B2 (en) 2010-07-06
EP1806962B1 (en) 2012-02-22
CN101001519B (zh) 2010-06-16
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US20070157462A1 (en) 2007-07-12
CN101001519A (zh) 2007-07-18

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