JP4703980B2 - 積層型ボールグリッドアレイパッケージ及びその製造方法 - Google Patents
積層型ボールグリッドアレイパッケージ及びその製造方法 Download PDFInfo
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Description
また、本発明が解決しようとする技術的課題の他側面は、高さを高くせずとも実装密度を改善できる積層型BGAパッケージを提供することである。
また、本発明が解決しようとする他の技術的課題は、前記の積層型BGAパッケージの製造方法を提供することである。
前記ソルダボールをソルダリングする段階後に、前記パッケージとパッケージ間を連結するソルダボールを密封剤で封止する段階をさらに含みうる。
併せて、ソルダボールを媒介として多数のBGAパッケージを積層することにより、別途のフレキシブル基板を使用せずともよいので、電気的連結長を短くできる。
併せて、BGAパッケージ間を導通させるソルダボールは密封剤により封止されているので、ボールに加えられるストレスを減らせ、下部BGAパッケージの回路層を保護でき、パッケージ信頼性が改善される。
まず、図7Aに図示されたように、基板101上に第1チップ103を、例えば接着剤(図示せず)により付着する。印刷回路基板101の底面には図6のようにソルダボール載置パッド130及び導電パターン135が形成されており、上面縁にワイヤボンディングパッド109が形成されている。第1チップ103は上面縁にボンディングパッド103aを備えており、このような第1チップ103は素子形成面が上部を向きつつ基板101のワイドボンディングパッド109が露出されるように印刷回路基板101に付着される。その後、ボンディングパッド103aとワイヤボンディングパッド109とが連結されるようにワイヤ111aでボンディングする。その後、図7Bに図示されたように、接着層107を利用して第1チップ103上に第2チップ105を付着する。この時、第2チップ105もまた上面縁にボンディングパッド105aを備えており、第2チップ105の背面と第1チップ103の上面とが接触されるように付着する。ここで、第2チップ105は第1チップ103と同じ機能を行うか、全く異なる機能を行える。その後、第2チップ105のパッド105aと印刷回路基板101のワイヤボンディングパッド109間にワイヤ111bを連結し、第2チップ105と印刷回路基板101とを電気的に導通させる。
図8Aを参照すれば、前記のような方式で形成された単位BGAパッケージ100aの上部、すなわち封止体113’に覆われないことによって露出された第2チップ105の上面に回路層120を形成する。この時、回路層120は図4に図示されたように、ソルダボール載置パッド121及び導電パッド123を含み、図5Aでのようにテープ状であってもよく、図5Bでのようにチップ105のボンディングパッド105aと一体であってもよい。その後、図8Bでのように、回路層120が形成された単位BGAパッケージ100a(ベースパッケージ)の上部にソルダボール116を挟んで他の単位BGAパッケージ100bを積層する。この時、積層される単位BGAパッケージ100b(以下、上部BGAパッケージ)はパッケージテストが完了した状態であり、下部に位置するベースBGAパッケージ100aと同じ構成を有するか、異なる構成を有しうる。この時、BGAパッケージ100a,100b間に介在されるソルダボール116は回路層120のソルダボール載置パッド121と接触されつつ、上部BGAパッケージ100bの印刷回路基板101底面のソルダボール載置パッド130と同時にコンタクトされ、上下部BGAパッケージを電気的に導通させる。その後、ソルダボール116に加えられるストレスを分散させると共に回路層120を保護するために、上下BGAパッケージ100a,100b間に介在されるソルダボール116を密封剤140によってモールディングする。
ここで、最上端に積層される単位BGAパッケージの場合、第2チップ105(最上端に配されるチップ)の上部に回路層120を形成せずともよく、第2チップ105の表面を覆うように封止体113’を形成しなければならない。
本実施例による積層型BGAパッケージ200は、図10に図示されたように、多数個積層されたBGAパッケージ200aないし200dを含む。ここで、最下端に位置するBGAパッケージ200aを第1 BGAパッケージと呼び、上部に積層されたパッケージを順次に第2、第3及び第4 BGAパッケージ200b,200c,200dと呼ぶ。第1ないし第4 BGAパッケージ200aないし200dはそれぞれ相異なる数の半導体チップを含みうる。例えば、本実施例では第1及び第4 BGAパッケージ200a,200dはそれぞれ1つの半導体チップ203を含む一方、第2及び第3 BGAパッケージ200b,200cは多数の半導体チップ、望ましくは2個の半導体チップ203,205を含む。この時、第1及び第4 BGAパッケージ200a,200dもまたそれぞれ他の数の半導体チップを含むことができ、第2及び第3 BGAパッケージ200b,200cもまたそれぞれ異なる数の半導体チップを含みうる。
このように、積層型BGAパッケージ内に実装される相異なる数の半導体チップを実装しても、同じ効果を発揮できる。
101 印刷回路基板
103,105 半導体チップ
103a,105a ボンディングパッド
107 接着層
109 ワイヤボンディングパッド
111a,111b ワイヤ
113,113’ 封止体
115,116 ソルダボール
200 半導体パッケージ
Claims (19)
- 少なくとも1つのチップを含むベースボールグリッドアレイ(BGA)パッケージと、
前記ベースBGAパッケージ上に積層され、少なくとも1つのチップを含む多数のBGAパッケージとを含み、
前記ベースBGAパッケージ及びその上部に積層される多数のBGAパッケージはソルダボールによって電気的に導通され、
前記ベースBGAパッケージ及びベースBGAパッケージ上に積層されるそれぞれのBGAパッケージは、
表面にワイヤボンディングパッドが配列され、背面に前記ワイヤボンディングパッドと電気的に連結されるソルダボール載置パッドが配列された印刷回路基板と、
前記印刷回路基板の表面に付着され、ボンディングパッドを含む少なくとも1つの半導体チップと、
前記半導体チップのボンディングパッドと前記印刷回路基板のワイヤボンディングパッドとを連結するワイヤと、
前記ワイヤボンディングパッド、ボンディングパッド及びワイヤを覆い包むように印刷回路基板の所定部分に形成される封止体と、
前記印刷回路基板の底面のソルダボール載置パッドに付着されるソルダボールとを含み、
前記最上部BGAパッケージを除外したBGAパッケージの封止体は最上部に位置する半導体チップの表面が露出されるように形成され、
前記封止体によって露出された最上部の半導体チップ表面と、その上部に積層されるBGAパッケージのソルダボール間に回路層が介在され、
前記回路層は前記ソルダボール載置パッド及び前記ソルダボール載置パッドと半導体チップのボンディングパッドとを連結する導電パターンを備え、
前記回路層のソルダボール載置パッドと導電パターンとは前記半導体チップのボンディングパッドと一体に構成されたことを特徴とする積層型BGAパッケージ。 - 前記少なくとも1つの半導体チップは、素子が形成された面が上部を向くように付着されることを特徴とする請求項1に記載の積層型BGAパッケージ。
- 前記回路層のソルダボール載置パッドは前記基板底面のソルダボール載置パッドと対応するように配され、
前記ソルダボールは回路層のソルダボール載置パッド及び基板のソルダボール載置パッドとコンタクトされるように付着されることを特徴とする請求項1に記載の積層型BGAパッケージ。 - 前記最上部に積層されるBGAパッケージの封止体は該当パッケージ内の最上部に付着されるチップの表面を覆うように形成されることを特徴とする請求項1に記載の積層型パッケージ。
- 前記ベースパッケージ及び積層される多数のBGAパッケージそれぞれは同一数の半導体チップを含むことを特徴とする請求項1に記載の積層型BGAパッケージ。
- 前記ベースパッケージ及び積層される多数のBGAパッケージは相異なる数の半導体チップを含むことを特徴とする請求項1に記載の積層型BGAパッケージ。
- 前記積層されたBGAパッケージ間を連結するソルダボールは密封剤により封止されることを特徴とする請求項1に記載の積層型BGAパッケージ。
- 前記1つのBGAパッケージに実装される半導体チップの数は2つまたは3つであることを特徴とする請求項1に記載の積層型BGAパッケージ。
- 第1ないし第nパッケージが順次に積層、連結された積層型BGA半導体パッケージであり、
前記第1ないし第nパッケージは、上面にワイヤボンディングパッドが配列されて底面にソルダボール載置パッドが配列された印刷回路基板と、前記印刷回路基板の上面に付着されて上面にボンディングパッドが配列されている少なくとも1つの半導体チップと、前記印刷回路基板のワイヤボンディングパッドと前記半導体チップのボンディングパッドとを連結するワイヤと、前記ワイヤボンディングパッド、ボンディングパッド及びワイヤを覆い包むように前記印刷回路基板の所定部分に形成される封止体、及び前記印刷回路基板の底面に付着されるソルダボールを含み、前記第1ないし第n−1パッケージの上部に、最上部の半導体チップと電気的に連結されるように回路層が付着され、
前記回路層は上部に積層されるパッケージのソルダボールと電気的に連結され、
前記回路層は前記ソルダボール載置パッド及び前記ソルダボール載置パッドと半導体チップのボンディングパッドとを連結する導電パターンを備え、
前記回路層のソルダボール載置パッドと導電パターンとは前記半導体チップのボンディングパッドと一体に構成されたことを特徴とする積層型BGA半導体パッケージ。 - 前記少なくとも1つの半導体チップは素子が形成された面が上部を向くように付着されることを特徴とする請求項9に記載の積層型BGAパッケージ。
- 前記第1ないし第n−1パッケージの封止体は最上部に付着される半導体チップの表面が露出されるように形成されることを特徴とする請求項9に記載の積層型BGAパッケージ。
- 前記回路層のソルダボール載置パッドは前記基板底面のソルダボール載置パッドと対応するように配され、
前記ソルダボールは回路層のソルダボール載置パッド及び基板のソルダボール載置パッドとコンタクトされるように付着されることを特徴とする請求項9に記載の積層型BGAパッケージ。 - 前記第nパッケージの封止体は該当パッケージ内の最上部に付着されるチップの表面を覆うように形成されることを特徴とする請求項9に記載の積層型BGAパッケージ。
- 前記第1ないし第nパッケージそれぞれは同一数の半導体チップを含むことを特徴とする請求項9に記載の積層型BGAパッケージ。
- 前記第1ないし第nパッケージは相異なる数の半導体チップを含むことを特徴とする請求項9に記載の積層型BGAパッケージ。
- 前記第2ないし第nパッケージのソルダボールは密封剤によって封止されることを特徴とする請求項9に記載の積層型BGAパッケージ。
- (a)少なくとも1つの半導体チップを備えるBGAパッケージを準備する段階と、
(b)前記BGAパッケージ上部に前記半導体チップと電気的に連結されるように回路層を形成する段階と、
(c)前記回路層の上部に他のBGAパッケージを少なくとも1つ積層させる段階とを含み、
前記BGAパッケージを準備する段階は、
上面にワイヤボンディングパッドが配列されており、底面にソルダボール載置パッドを備えた印刷回路基板を提供する段階と、
前記印刷回路基板の上面に、ボンディングパッドを備えた第1半導体チップを付着する段階と、
前記第1半導体チップのボンディングパッドと前記印刷回路基板のワイヤボンディングパッドとをワイヤでボンディングする段階と、
前記第1半導体チップ上部に、ボンディングパッドを備えた第2半導体チップを付着する段階と、
前記第2半導体チップのボンディングパッドと前記印刷回路基板のワイヤボンディングパッドとをワイヤでボンディングする段階と、
前記印刷回路基板のワイヤボンディングパッド、第1及び第2半導体チップのボンディングパッド及びワイヤを保護するように印刷回路基板の所定部分に封止体を形成する段階と、
前記印刷回路基板の背面にソルダボールをソルダリングする段階とを含み、
前記回路層を形成する段階は、
前記第2半導体チップのボンディングパッドの形成と同時に、ソルダボール載置パッドと、ソルダボール載置パッド及びボンディングパッドを連結する導電パターンとを形成することを特徴とする積層型BGAパッケージの製造方法。 - 前記最上部に積層されるBGAパッケージの封止体を形成する段階は、前記第2チップ表面が覆われるように封止体を形成することを特徴とする請求項17に記載の積層型BGAパッケージの製造方法。
- 前記ソルダボールをソルダリングする段階後に、前記パッケージとパッケージ間を連結するソルダボールを密封剤で封止する段階をさらに含むことを特徴とする請求項17に記載の積層型BGAパッケージの製造方法。
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US7939924B2 (en) | 2011-05-10 |
JP2005026680A (ja) | 2005-01-27 |
US7298033B2 (en) | 2007-11-20 |
US20040262734A1 (en) | 2004-12-30 |
US20080042253A1 (en) | 2008-02-21 |
KR100604821B1 (ko) | 2006-07-26 |
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