JP4689218B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP4689218B2
JP4689218B2 JP2004263486A JP2004263486A JP4689218B2 JP 4689218 B2 JP4689218 B2 JP 4689218B2 JP 2004263486 A JP2004263486 A JP 2004263486A JP 2004263486 A JP2004263486 A JP 2004263486A JP 4689218 B2 JP4689218 B2 JP 4689218B2
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JP
Japan
Prior art keywords
film
region
semiconductor
insulating film
semiconductor device
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Expired - Fee Related
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JP2004263486A
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English (en)
Japanese (ja)
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JP2005109465A (ja
JP2005109465A5 (enrdf_load_stackoverflow
Inventor
舜平 山崎
徹 高山
慎志 前川
誠 古野
哲司 山口
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2004263486A priority Critical patent/JP4689218B2/ja
Publication of JP2005109465A publication Critical patent/JP2005109465A/ja
Publication of JP2005109465A5 publication Critical patent/JP2005109465A5/ja
Application granted granted Critical
Publication of JP4689218B2 publication Critical patent/JP4689218B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
JP2004263486A 2003-09-12 2004-09-10 半導体装置の作製方法 Expired - Fee Related JP4689218B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004263486A JP4689218B2 (ja) 2003-09-12 2004-09-10 半導体装置の作製方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2003322324 2003-09-12
JP2003322324 2003-09-12
JP2004263486A JP4689218B2 (ja) 2003-09-12 2004-09-10 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2005109465A JP2005109465A (ja) 2005-04-21
JP2005109465A5 JP2005109465A5 (enrdf_load_stackoverflow) 2007-10-18
JP4689218B2 true JP4689218B2 (ja) 2011-05-25

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Family Applications (1)

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JP2004263486A Expired - Fee Related JP4689218B2 (ja) 2003-09-12 2004-09-10 半導体装置の作製方法

Country Status (1)

Country Link
JP (1) JP4689218B2 (enrdf_load_stackoverflow)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102569409A (zh) * 2012-02-28 2012-07-11 上海华力微电子有限公司 双层隔离纵向堆叠式半导体纳米线mosfet
CN102569410A (zh) * 2012-02-28 2012-07-11 上海华力微电子有限公司 双层隔离半导体纳米线mosfet
KR101730997B1 (ko) * 2014-04-04 2017-04-27 알프스 덴키 가부시키가이샤 전자 부품
KR101730994B1 (ko) * 2014-04-04 2017-04-27 알프스 덴키 가부시키가이샤 전자 부품

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US7135773B2 (en) * 2004-02-26 2006-11-14 International Business Machines Corporation Integrated circuit chip utilizing carbon nanotube composite interconnection vias
JP2005277096A (ja) * 2004-03-24 2005-10-06 Japan Science & Technology Agency カーボンナノチューブ含有金属膜を用いてなる半導体配線とその製造方法、およびカーボンナノチューブ含有金属膜の製造方法
JP4855757B2 (ja) * 2005-10-19 2012-01-18 富士通株式会社 カーボンナノチューブパッド及び電子デバイス
JP4499752B2 (ja) * 2006-03-03 2010-07-07 日本エレクトロプレイテイング・エンジニヤース株式会社 電子部品
US7713858B2 (en) 2006-03-31 2010-05-11 Intel Corporation Carbon nanotube-solder composite structures for interconnects, process of making same, packages containing same, and systems containing same
JP4899703B2 (ja) * 2006-08-07 2012-03-21 富士通株式会社 カーボン配線構造およびその製造方法、および半導体装置
JP5233125B2 (ja) * 2007-02-01 2013-07-10 富士通株式会社 半導体装置
JP5168984B2 (ja) * 2007-03-30 2013-03-27 富士通株式会社 カーボンナノチューブ金属複合材料によるデバイス構造
RU2010114227A (ru) 2007-09-12 2011-10-20 Смольтек Аб (Se) Соединение и связывание соседних слоев наноструктурами
JP2009117591A (ja) * 2007-11-06 2009-05-28 Panasonic Corp 配線構造及びその形成方法
CN102007571B (zh) * 2008-02-25 2016-01-20 斯莫特克有限公司 纳米结构制造过程中的导电助层的沉积和选择性移除
JP5186662B2 (ja) * 2008-09-16 2013-04-17 富士通株式会社 電子部品及び電子部品の製造方法
US9099537B2 (en) * 2009-08-28 2015-08-04 International Business Machines Corporation Selective nanotube growth inside vias using an ion beam
CN102376625B (zh) * 2010-08-11 2014-03-19 中国科学院微电子研究所 一种半导体器件及其制造方法
CN102376686B (zh) * 2010-08-11 2013-09-18 中国科学院微电子研究所 一种半导体器件及其制造方法
WO2012102281A1 (en) * 2011-01-28 2012-08-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP6328870B2 (ja) * 2011-11-11 2018-05-23 株式会社Ihi ナノ構造物の製造方法
JP5978600B2 (ja) * 2011-11-21 2016-08-24 富士通株式会社 半導体装置の製造方法
CN105070767B (zh) * 2015-08-05 2018-04-20 西安电子科技大学 一种基于碳基复合电极的高温SiC JFET器件
KR102403468B1 (ko) 2016-05-06 2022-05-31 스몰텍 에이비 어셈블리 플랫폼
KR102326519B1 (ko) * 2017-06-20 2021-11-15 삼성전자주식회사 반도체 장치

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10006964C2 (de) * 2000-02-16 2002-01-31 Infineon Technologies Ag Elektronisches Bauelement mit einer leitenden Verbindung zwischen zwei leitenden Schichten und Verfahren zum Herstellen eines elektronischen Bauelements
JP2002009146A (ja) * 2000-06-19 2002-01-11 Hitachi Ltd 半導体集積回路装置の製造方法および半導体集積回路装置
JP4212258B2 (ja) * 2001-05-02 2009-01-21 富士通株式会社 集積回路装置及び集積回路装置製造方法
JP2003017467A (ja) * 2001-06-28 2003-01-17 Hitachi Ltd 半導体集積回路装置の製造方法および半導体集積回路装置
JP2003142755A (ja) * 2001-11-05 2003-05-16 Fujitsu Ltd 磁気抵抗センサ及びその製造方法
JP4032116B2 (ja) * 2002-11-01 2008-01-16 国立大学法人信州大学 電子部品およびその製造方法
US7518247B2 (en) * 2002-11-29 2009-04-14 Nec Corporation Semiconductor device and its manufacturing method

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102569409A (zh) * 2012-02-28 2012-07-11 上海华力微电子有限公司 双层隔离纵向堆叠式半导体纳米线mosfet
CN102569410A (zh) * 2012-02-28 2012-07-11 上海华力微电子有限公司 双层隔离半导体纳米线mosfet
CN102569410B (zh) * 2012-02-28 2014-06-11 上海华力微电子有限公司 双层隔离半导体纳米线mosfet
CN102569409B (zh) * 2012-02-28 2014-07-16 上海华力微电子有限公司 双层隔离纵向堆叠式半导体纳米线mosfet
KR101730997B1 (ko) * 2014-04-04 2017-04-27 알프스 덴키 가부시키가이샤 전자 부품
KR101730994B1 (ko) * 2014-04-04 2017-04-27 알프스 덴키 가부시키가이샤 전자 부품

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