JP4636501B2 - 半導体装置、プリントヘッド及び画像形成装置 - Google Patents
半導体装置、プリントヘッド及び画像形成装置 Download PDFInfo
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- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0756—Stacked arrangements of devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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Description
図1は、実施の形態1で説明する本発明の半導体装置の上面図である。また、図2は、図1で示した半導体装置のA−A断面図である。実施の形態1で説明する半導体装置は、第1基板101上に反射層102及びパッシベーション膜103を備えている。そのパッシベーション膜103の積層方向上方に、半導体薄膜109c、半導体薄膜109b、半導体薄膜109aの順でパッシベーション膜103を介して積層される。そして、絶縁層104と、電極105、電極配線106、電極配線107、及び、電極108とを有している。
実施の形態2で説明する半導体装置は、実施の形態1で説明した半導体装置の発光領域が所定の領域に限定されている構造となっている半導体薄膜を有している。以下、この半導体装置について図7及び図8によって説明する。
実施の形態3で説明する半導体装置は、実施の形態1で説明したパッシベーション膜103を介して半導体薄膜109を積層した半導体装置のパッシベーション膜103と半導体薄膜109との間に導通層110を備えたものである。この導通層110は、導電性材料による層で、Au、Ni、Ge、Pt、Ti、In、Al、Cuのいずれかの元素を含む、単体、積層、複合又は合金材料や、ITO膜やZnO膜等の透明電極材料等が挙げられる。この層の厚さとしては、50nmから300nmが好ましい。300nm以上では、透過率が大きく減少し、50nm以下では、抵抗が大きく増加してしまう。
実施の形態4で説明する半導体装置は、半導体薄膜上に導通層を設け、この導通層の上に別の半導体薄膜をボンディングした構造となっている。以下、この半導体装置について図12及び図13によって説明する。
実施の形態5で説明する半導体装置は、図16及び図17に示されるように、実施の形態4で説明した半導体薄膜にコンタクト層と接触する電極を金属とし、積層された半導体薄膜の1つの端面を残して全てを金属の電極によって被うように形成された半導体装置である。
実施の形態6で説明する半導体装置は、pn接合を有する複数の半導体薄膜を直列に接続して積層した複数の半導体装置群を直列に接続した半導体装置である。この半導体装置について図18及び図19によって説明する。
実施の形態7で説明する半導体装置は、複数の半導体薄膜を電極配線及び該電極配線を有する層を平坦化する平坦化膜を介して積層させた半導体装置である。以下、この半導体装置について図20乃至図23により説明する。
実施の形態8で説明する半導体装置は、複数の半導体薄膜を積層せずに1つの基板上で直列に接続した構造を有している。以下、この半導体装置について図24乃至図25により説明する。
102 反射層
103 パッシベーション膜
104 絶縁層
105、108 電極
106、107 電極配線
109、109a、109b、109c 半導体薄膜
310 第1導電型ボンディング層
311 第1導電型導通層
312 第1導電型コンタクト層
313 第1導電型エッチング停止層
314 第1導電型分離層
315 第1導電型クラッド層
316 第1導電型活性層
317 第2導電型クラッド層
318 第2導電型コンタクト層
Claims (10)
- 基板と、
当該基板上に積層され、各々が有するpn接合に電流を流すことにより発光する複数の半導体薄膜と、
前記複数の半導体薄膜のうち、対向する半導体薄膜間に設けられ、絶縁性を有するパッシベーション膜と、
前記対向する半導体薄膜を電気的に接続する電極配線とを備え、
前記複数の半導体薄膜の各々は、当該半導体薄膜の下側に位置する第1導電型コンタクト層と、上側に位置する第2導電型コンタクト層を有し、前記第1導電型コンタクト層及び前記第2導電型コンタクト層は上面側に露出部を有し、
前記電極配線は、前記対向する半導体薄膜のうち、上側に位置する半導体薄膜の前記第1導電型コンタクト層の前記露出部と、下側に位置する半導体薄膜の前記第2導電型コンタクト層の前記露出部とを電気的に接続することを特徴とする半導体装置。 - 前記半導体薄膜は、発光する領域が限定されていることを特徴とする請求項1記載の半導体装置。
- 複数の前記半導体薄膜は、複数の前記半導体薄膜間を流れる電流を通す導通膜を介して1つの前記基板上に積層されていることを特徴とする請求項1記載の半導体装置。
- 前記導通膜は、金属を含むことを特徴とする請求項3記載の半導体装置。
- 前記導通膜は、透明導電膜を含むことを特徴とする請求項3記載の半導体装置。
- 前記基板上に駆動回路を備えたことを特徴とする請求項1記載の半導体装置。
- 前記半導体薄膜は、積層方向上面及び側面が金属層で被われており、
前記基板上に積層された複数の前記半導体薄膜は、前記pn接合に電流を流すことにより発光する光を前記半導体薄膜の積層方向端面から取り出すことを特徴とする請求項1記載の半導体装置。 - 複数の前記半導体薄膜は、前記電極配線及び該電極配線を有する層を平坦化する平坦化膜を介して1つの前記基板上に積層されていることを特徴とする請求項1記載の半導体装置。
- 請求項1乃至請求項9に記載の半導体装置を備えることを特徴とするプリントヘッド。
- 請求項9記載のプリントヘッドを備えることを特徴とする画像形成装置。
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JP2005139655A JP4636501B2 (ja) | 2005-05-12 | 2005-05-12 | 半導体装置、プリントヘッド及び画像形成装置 |
US11/382,752 US8035115B2 (en) | 2005-05-12 | 2006-05-11 | Semiconductor apparatus, print head, and image forming apparatus |
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JP2005139655A JP4636501B2 (ja) | 2005-05-12 | 2005-05-12 | 半導体装置、プリントヘッド及び画像形成装置 |
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JP2006319099A JP2006319099A (ja) | 2006-11-24 |
JP4636501B2 true JP4636501B2 (ja) | 2011-02-23 |
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Cited By (1)
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US8035115B2 (en) | 2011-10-11 |
US20060255343A1 (en) | 2006-11-16 |
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