JP4436765B2 - 低応力半導体ダイ・アタッチ - Google Patents

低応力半導体ダイ・アタッチ Download PDF

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Publication number
JP4436765B2
JP4436765B2 JP2004564760A JP2004564760A JP4436765B2 JP 4436765 B2 JP4436765 B2 JP 4436765B2 JP 2004564760 A JP2004564760 A JP 2004564760A JP 2004564760 A JP2004564760 A JP 2004564760A JP 4436765 B2 JP4436765 B2 JP 4436765B2
Authority
JP
Japan
Prior art keywords
die
solder
dewetting
outer edge
die attach
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004564760A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006512765A5 (https=
JP2006512765A (ja
Inventor
ダブリュ. コンディ、ブライアン
ジェイ. ドゥラティ、デイビッド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
Original Assignee
NXP USA Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP USA Inc filed Critical NXP USA Inc
Publication of JP2006512765A publication Critical patent/JP2006512765A/ja
Publication of JP2006512765A5 publication Critical patent/JP2006512765A5/ja
Application granted granted Critical
Publication of JP4436765B2 publication Critical patent/JP4436765B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/121Arrangements for protection of devices protecting against mechanical damage
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • H10W72/07336Soldering or alloying
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
    • H10W72/07337Connecting techniques using a polymer adhesive, e.g. an adhesive based on silicone or epoxy
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07351Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07352Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in structures or sizes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/321Structures or relative sizes of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/321Structures or relative sizes of die-attach connectors
    • H10W72/325Die-attach connectors having a filler embedded in a matrix
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • H10W72/352Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • H10W72/353Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Die Bonding (AREA)
JP2004564760A 2002-12-30 2003-09-30 低応力半導体ダイ・アタッチ Expired - Fee Related JP4436765B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/334,042 US7042103B2 (en) 2002-12-30 2002-12-30 Low stress semiconductor die attach
PCT/US2003/030862 WO2004061936A1 (en) 2002-12-30 2003-09-30 Low stress semiconductor die attach

Publications (3)

Publication Number Publication Date
JP2006512765A JP2006512765A (ja) 2006-04-13
JP2006512765A5 JP2006512765A5 (https=) 2006-11-24
JP4436765B2 true JP4436765B2 (ja) 2010-03-24

Family

ID=32654908

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004564760A Expired - Fee Related JP4436765B2 (ja) 2002-12-30 2003-09-30 低応力半導体ダイ・アタッチ

Country Status (5)

Country Link
US (1) US7042103B2 (https=)
JP (1) JP4436765B2 (https=)
KR (1) KR20050094820A (https=)
AU (1) AU2003279079A1 (https=)
WO (1) WO2004061936A1 (https=)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7332414B2 (en) * 2005-06-22 2008-02-19 Freescale Semiconductor, Inc. Chemical die singulation technique
TW200820455A (en) * 2006-10-18 2008-05-01 Young Lighting Technology Corp LED package and manufacture method thereof
US8274162B2 (en) * 2007-01-20 2012-09-25 Triquint Semiconductor, Inc. Apparatus and method for reduced delamination of an integrated circuit module
US8456023B2 (en) 2007-04-27 2013-06-04 Freescale Semiconductor, Inc. Semiconductor wafer processing
CN101295695A (zh) * 2007-04-29 2008-10-29 飞思卡尔半导体(中国)有限公司 具有焊料流动控制的引线框架
US8718720B1 (en) * 2010-07-30 2014-05-06 Triquint Semiconductor, Inc. Die including a groove extending from a via to an edge of the die
CN102255033B (zh) * 2011-07-14 2013-04-10 佛山市蓝箭电子股份有限公司 一种大功率led封装结构及其封装方法
US9177907B1 (en) 2012-04-03 2015-11-03 Rockwell Collins, Inc. High performance deposited die attach
US8962389B2 (en) 2013-05-30 2015-02-24 Freescale Semiconductor, Inc. Microelectronic packages including patterned die attach material and methods for the fabrication thereof
US9171786B1 (en) 2014-07-02 2015-10-27 Freescale Semiconductor, Inc. Integrated circuit with recess for die attachment
JP6430422B2 (ja) * 2016-02-29 2018-11-28 株式会社東芝 半導体装置
US11114387B2 (en) 2017-02-15 2021-09-07 Industrial Technology Research Institute Electronic packaging structure
US11488923B2 (en) 2019-05-24 2022-11-01 Wolfspeed, Inc. High reliability semiconductor devices and methods of fabricating the same
CN112038216A (zh) * 2020-09-08 2020-12-04 重庆邮电大学 一种p型非晶态半导体薄膜及其薄膜晶体管制备方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0023534A3 (en) * 1979-08-06 1982-04-28 Teccor Electronics, Inc. Semiconductor device mounting structure and method of mounting
US4918511A (en) 1985-02-01 1990-04-17 Advanced Micro Devices, Inc. Thermal expansion compensated metal lead frame for integrated circuit package
US4903118A (en) * 1988-03-30 1990-02-20 Director General, Agency Of Industrial Science And Technology Semiconductor device including a resilient bonding resin
US5075254A (en) 1988-04-26 1991-12-24 National Semiconductor Corporation Method and apparatus for reducing die stress
US4952999A (en) 1988-04-26 1990-08-28 National Semiconductor Corporation Method and apparatus for reducing die stress
US5261155A (en) * 1991-08-12 1993-11-16 International Business Machines Corporation Method for bonding flexible circuit to circuitized substrate to provide electrical connection therebetween using different solders
US5156998A (en) 1991-09-30 1992-10-20 Hughes Aircraft Company Bonding of integrated circuit chip to carrier using gold/tin eutectic alloy and refractory metal barrier layer to block migration of tin through via holes
US5350662A (en) 1992-03-26 1994-09-27 Hughes Aircraft Company Maskless process for forming refractory metal layer in via holes of GaAs chips
US5409863A (en) * 1993-02-19 1995-04-25 Lsi Logic Corporation Method and apparatus for controlling adhesive spreading when attaching an integrated circuit die
JP3350152B2 (ja) * 1993-06-24 2002-11-25 三菱電機株式会社 半導体装置およびその製造方法
JP3263288B2 (ja) * 1995-09-13 2002-03-04 株式会社東芝 半導体装置
SG46955A1 (en) 1995-10-28 1998-03-20 Inst Of Microelectronics Ic packaging lead frame for reducing chip stress and deformation
US5804880A (en) 1996-11-04 1998-09-08 National Semiconductor Corporation Solder isolating lead frame
US5825093A (en) * 1997-03-31 1998-10-20 Motorola, Inc. Attachment system and method therefor
US6169322B1 (en) 1998-03-06 2001-01-02 Cypress Semiconductor Corporation Die attach pad adapted to reduce delamination stress and method of using same
JP3274647B2 (ja) 1998-05-15 2002-04-15 日本電気株式会社 光半導体素子の実装構造
US6687987B2 (en) * 2000-06-06 2004-02-10 The Penn State Research Foundation Electro-fluidic assembly process for integration of electronic devices onto a substrate
US6672947B2 (en) * 2001-03-13 2004-01-06 Nptest, Llc Method for global die thinning and polishing of flip-chip packaged integrated circuits
US20020182385A1 (en) * 2001-05-29 2002-12-05 Rensselaer Polytechnic Institute Atomic layer passivation

Also Published As

Publication number Publication date
US7042103B2 (en) 2006-05-09
US20040124543A1 (en) 2004-07-01
KR20050094820A (ko) 2005-09-28
WO2004061936A1 (en) 2004-07-22
AU2003279079A1 (en) 2004-07-29
JP2006512765A (ja) 2006-04-13

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