JP4425217B2 - 可撓性の重ねられたチップ・アセンブリとその形成方法 - Google Patents
可撓性の重ねられたチップ・アセンブリとその形成方法 Download PDFInfo
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- JP4425217B2 JP4425217B2 JP2005509922A JP2005509922A JP4425217B2 JP 4425217 B2 JP4425217 B2 JP 4425217B2 JP 2005509922 A JP2005509922 A JP 2005509922A JP 2005509922 A JP2005509922 A JP 2005509922A JP 4425217 B2 JP4425217 B2 JP 4425217B2
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- 238000000034 method Methods 0.000 title claims abstract description 10
- 239000000758 substrate Substances 0.000 claims abstract description 12
- 239000000463 material Substances 0.000 claims description 10
- 239000010949 copper Substances 0.000 claims description 8
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 7
- 229910052802 copper Inorganic materials 0.000 claims description 7
- 230000000712 assembly Effects 0.000 claims description 6
- 238000000429 assembly Methods 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 239000002918 waste heat Substances 0.000 claims description 4
- 239000004020 conductor Substances 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- 239000000969 carrier Substances 0.000 claims 1
- 230000037361 pathway Effects 0.000 abstract 1
- 239000004642 Polyimide Substances 0.000 description 10
- 229920001721 polyimide Polymers 0.000 description 10
- 230000006870 function Effects 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 230000032683 aging Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 2
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910001120 nichrome Inorganic materials 0.000 description 2
- 238000011160 research Methods 0.000 description 2
- 238000010561 standard procedure Methods 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- 239000004593 Epoxy Substances 0.000 description 1
- 229910000792 Monel Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000010408 film Substances 0.000 description 1
- 230000014759 maintenance of location Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- NRTDAKURTMLAFN-UHFFFAOYSA-N potassium;gold(3+);tetracyanide Chemical compound [K+].[Au+3].N#[C-].N#[C-].N#[C-].N#[C-] NRTDAKURTMLAFN-UHFFFAOYSA-N 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
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- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0657—Stacked arrangements of devices
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
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- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5387—Flexible insulating substrates
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- H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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Description
Claims (14)
- 互いに積層され、別個の絶縁された相互接続部(40、50)により互いに可撓的に接続された複数のチップ(100、110、120)と、
積層された前記複数のチップ(100、110、120)に可撓的に接続されたチップ・キャリア(500)上に取り付けられ、前記積層された前記複数のチップと前記チップ・キャリア(500)上のパッド(510)との間の電気的接続を提供する1個のボンディング用チップ(130)と、を有し、
前記複数のチップ(100、110、120)と、前記ボンディング用チップ(130)とがそれぞれの上面が露出するように可撓性の誘電体層(30)に埋め込まれ、前記複数のチップは、前記可撓性の誘電体層(30)を折り重ねることによって積層され、折り重なった2層の前記可撓性の誘電体層(30)を挟んで互いに重なる第1チップ(110)および第2チップ(100)を含む、チップ・アセンブリ。 - 互いに積層され、別個の絶縁された相互接続部(40、50)により互いに可撓的に接続された複数のチップ(100、110、120)と、
前記積層された前記複数のチップ(100、110、120)のうち一番下に配置された第1チップ(110)が、前記複数のチップとチップ・キャリア(600)上のパッドとの間の電気的接触を与えるはんだボールのグリッド・アレイ(550)を有し、
前記複数のチップ(100、110、120)がそれぞれの上面が露出するように可撓性の誘電体層(30)に埋め込まれ、前記複数のチップは、前記可撓性の誘電体層(30)を折り重ねることによって積層され、折り重なった2層の前記可撓性の誘電体層(30)を挟んで互いに重なる前記第1チップ(110)および第2チップ(100)を含む、チップ・アセンブリ。 - 前記別個の絶縁された相互接続部が、アルミニウム及び銅からなる群から選択された導体材料から成る、請求項1または請求項2に記載のチップ・アセンブリ。
- 前記相互接続部の長さが、各チップが折り重ねられる順番によって決定される、請求項1または請求項2に記載のチップ・アセンブリ。
- 折り重ねられた前記可撓性の誘電体層(30)に沿って設けられ、前記複数のチップから発生する廃熱を排除する手段を提供する熱伝導層または熱導管(300)を更に有する、請求項1または請求項2に記載のチップ・アセンブリ。
- 前記複数のチップのうち少なくとも1個のチップが、前記可撓性の誘電体層(30)に設けた熱伝導性バイア(200)を介して前記熱伝導層または熱導管に物理的に接続された、請求項4に記載のチップ・アセンブリ。
- 前記積層された前記複数のチップにおいて、前記第1チップ(110)の底面(相互接続される面)が、前記第2チップ(100)の底面に面し、前記第2チップの上面に面する底面を有する第3チップ(120)をさらに含む、請求項1または請求項2に記載のチップ・アセンブリ。
- 前記複数のチップ(100、110、120)が、折り重ねる前に互いにほぼ平行に前記前記可撓性の誘電体層(30)に配置されたチップにより構成された、請求項1または請求項2に記載のチップ・アセンブリ。
- 前記チップ・キャリア(500)が、シリコン基板、システム・オン・パッケージ、トランスポーザ及びプリント回路基板からなる群から選択される、請求項1または請求項2に記載のチップ・アセンブリ。
- 前記相互接続部は、前記可撓性の誘電体層(30)の内部、または内部および上部に形成される、請求項1または請求項2に記載のチップ・アセンブリ。
- 請求項1乃至10に記載のチップ・アセンブリを複数個有するマルチ・チップ・アセンブリのアレイであって、前記チップ・アセンブリの少なくとも一個が、チップ・キャリア(700)に取り付けられた、マルチ・チップ・アセンブリのアレイ。
- 仮キャリア(10)上の剥離層(20)の上に、複数のチップ(100、110、120)およびボンディング用チップ(130)の上面が前記剥離層に接するように配置し、可撓性の誘電体層(30)で覆うステップと、
前記可撓性の誘電体層(30)に別個の絶縁された相互接続部(40、50)を設けて、前記複数のチップ間および前記複数のチップのうち少なくとも1つのチップと前記ボンディング用チップ(130)の間を接続するステップと、
複数のチップ(100、110、120)の各チップを前記仮キャリアから分離し、前記可撓性の誘電体層(30)を折り重ねることによって積層するステップと、
前記ボンディング用チップ(130)をチップ・キャリア(500)に電気的に接続するステップと、
を含み、
前記複数のチップ(100、110、120)と、前記ボンディング用チップ(130)とがそれぞれの上面が露出するように可撓性の誘電体層(30)に埋め込まれ、前記複数のチップは、前記可撓性の誘電体層(30)を折り重ねることによって積層され、折り重なった2層の前記可撓性の誘電体層(30)を挟んで互いに重なる第1チップ(110)および第2チップ(100)を含む、チップ・アセンブリを形成する方法。 - 仮キャリア(10)上の剥離層(20)の上に、複数のチップ(100、110、120)の上面が前記剥離層に接するように配置し、可撓性の誘電体層(30)で覆うステップと、
前記可撓性の誘電体層(30)に別個の絶縁された相互接続部(40、50)を設けて、前記複数のチップ間を接続するステップと、
複数のチップ(100、110、120)の各チップを前記仮キャリアから分離し、前記可撓性の誘電体層(30)を折り重ねることによって積層するステップと、
前記積層された前記複数のチップ(100、110、120)のうち一番下に配置された第1チップ(110)に設けられたはんだボールのグリッド・アレイ(550)をチップ・キャリア(600)上のパッドと電気的に接続するステップと、
を含み、
前記複数のチップ(100、110、120)はそれぞれの上面が露出するように可撓性の誘電体層(30)に埋め込まれ、前記複数のチップは、折り重なった2層の前記可撓性の誘電体層(30)を挟んで互いに重なる前記第1チップ(110)および第2チップ(100)を含む、チップ・アセンブリを形成する方法。 - 請求項1乃至10に記載のチップ・アセンブリを複数個、準備するステップと、
各チップ・アセンブリの前記チップの少なくとも1個をキャリア(700)に取り付けるステップと、
を含む、マルチ・チップ・アセンブリのアレイを形成する方法。
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-
2003
- 2003-09-30 CN CNB038271508A patent/CN100448104C/zh not_active Expired - Lifetime
- 2003-09-30 US US10/573,561 patent/US7355271B2/en not_active Expired - Lifetime
- 2003-09-30 WO PCT/US2003/030640 patent/WO2005041360A1/en active Application Filing
- 2003-09-30 JP JP2005509922A patent/JP4425217B2/ja not_active Expired - Lifetime
- 2003-09-30 AU AU2003279044A patent/AU2003279044A1/en not_active Abandoned
- 2003-09-30 AT AT03770552T patent/ATE522953T1/de not_active IP Right Cessation
- 2003-09-30 EP EP03770552A patent/EP1668745B1/en not_active Expired - Lifetime
-
2006
- 2006-03-23 IL IL174504A patent/IL174504A0/en unknown
Also Published As
Publication number | Publication date |
---|---|
IL174504A0 (en) | 2006-08-01 |
EP1668745B1 (en) | 2011-08-31 |
EP1668745A1 (en) | 2006-06-14 |
US20070059951A1 (en) | 2007-03-15 |
WO2005041360A1 (en) | 2005-05-06 |
CN100448104C (zh) | 2008-12-31 |
ATE522953T1 (de) | 2011-09-15 |
CN1839518A (zh) | 2006-09-27 |
JP2007521636A (ja) | 2007-08-02 |
US7355271B2 (en) | 2008-04-08 |
AU2003279044A1 (en) | 2005-05-11 |
EP1668745A4 (en) | 2008-12-03 |
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