JP4421811B2 - 半導体集積回路装置およびその製造方法 - Google Patents

半導体集積回路装置およびその製造方法 Download PDF

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Publication number
JP4421811B2
JP4421811B2 JP2002184292A JP2002184292A JP4421811B2 JP 4421811 B2 JP4421811 B2 JP 4421811B2 JP 2002184292 A JP2002184292 A JP 2002184292A JP 2002184292 A JP2002184292 A JP 2002184292A JP 4421811 B2 JP4421811 B2 JP 4421811B2
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Japan
Prior art keywords
layer
film
oxide film
element isolation
substrate
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Expired - Fee Related
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JP2002184292A
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English (en)
Japanese (ja)
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JP2004031559A (ja
Inventor
勝彦 一瀬
文雄 大塚
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Renesas Technology Corp
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Renesas Technology Corp
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Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2002184292A priority Critical patent/JP4421811B2/ja
Priority to TW092115541A priority patent/TW200403802A/zh
Priority to KR1020030041050A priority patent/KR20040002665A/ko
Priority to US10/602,697 priority patent/US6847093B2/en
Publication of JP2004031559A publication Critical patent/JP2004031559A/ja
Application granted granted Critical
Publication of JP4421811B2 publication Critical patent/JP4421811B2/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0188—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0143—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising concurrently refilling multiple trenches having different shapes or dimensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations

Landscapes

  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2002184292A 2002-06-25 2002-06-25 半導体集積回路装置およびその製造方法 Expired - Fee Related JP4421811B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2002184292A JP4421811B2 (ja) 2002-06-25 2002-06-25 半導体集積回路装置およびその製造方法
TW092115541A TW200403802A (en) 2002-06-25 2003-06-09 Semiconductor integrated circuit device and its manufacturing method
KR1020030041050A KR20040002665A (ko) 2002-06-25 2003-06-24 반도체 집적 회로 장치
US10/602,697 US6847093B2 (en) 2002-06-25 2003-06-25 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002184292A JP4421811B2 (ja) 2002-06-25 2002-06-25 半導体集積回路装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2004031559A JP2004031559A (ja) 2004-01-29
JP4421811B2 true JP4421811B2 (ja) 2010-02-24

Family

ID=30112248

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002184292A Expired - Fee Related JP4421811B2 (ja) 2002-06-25 2002-06-25 半導体集積回路装置およびその製造方法

Country Status (4)

Country Link
US (1) US6847093B2 (https=)
JP (1) JP4421811B2 (https=)
KR (1) KR20040002665A (https=)
TW (1) TW200403802A (https=)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4750342B2 (ja) * 2002-07-03 2011-08-17 ルネサスエレクトロニクス株式会社 Ｍｏｓ−ｆｅｔおよびその製造方法、並びに半導体装置
JP4368095B2 (ja) * 2002-08-21 2009-11-18 富士通マイクロエレクトロニクス株式会社 半導体装置及びその製造方法
US20040164373A1 (en) 2003-02-25 2004-08-26 Koester Steven John Shallow trench isolation structure for strained Si on SiGe
US7238985B2 (en) * 2003-08-13 2007-07-03 International Rectifier Corporation Trench type mosgated device with strained layer on trench sidewall
JP2005197405A (ja) 2004-01-06 2005-07-21 Toshiba Corp 半導体装置とその製造方法
US7462549B2 (en) * 2004-01-12 2008-12-09 Advanced Micro Devices, Inc. Shallow trench isolation process and structure with minimized strained silicon consumption
JP2005252067A (ja) * 2004-03-05 2005-09-15 Toshiba Corp 電界効果トランジスタ及びその製造方法
US7371658B2 (en) * 2004-06-17 2008-05-13 Texas Instruments Incorporated Trench isolation structure and a method of manufacture therefor
KR100620707B1 (ko) * 2004-12-31 2006-09-13 동부일렉트로닉스 주식회사 반도체 소자의 ｓｔｉ 형성 방법
US7465972B2 (en) 2005-01-21 2008-12-16 Taiwan Semiconductor Manufacturing Company, Ltd. High performance CMOS device design
US20060292762A1 (en) * 2005-06-22 2006-12-28 Epion Corporation Replacement gate field effect transistor with germanium or SiGe channel and manufacturing method for same using gas-cluster ion irradiation
US7323392B2 (en) * 2006-03-28 2008-01-29 Taiwan Semiconductor Manufacturing Company, Ltd. High performance transistor with a highly stressed channel
JP2008091614A (ja) * 2006-10-02 2008-04-17 Toshiba Corp 半導体装置およびその製造方法
JP5563186B2 (ja) * 2007-03-30 2014-07-30 ピーエスフォー ルクスコ エスエイアールエル 半導体装置及びその製造方法
JP5592750B2 (ja) * 2010-10-14 2014-09-17 株式会社東芝 半導体装置
US9698044B2 (en) * 2011-12-01 2017-07-04 Taiwan Semiconductor Manufacturing Company, Ltd. Localized carrier lifetime reduction
KR101831936B1 (ko) * 2011-12-22 2018-02-26 삼성전자주식회사 박막 형성 방법 및 이를 이용한 반도체 소자의 제조 방법
US8828851B2 (en) * 2012-02-01 2014-09-09 Stmicroeletronics, Inc. Method to enable the formation of silicon germanium channel of FDSOI devices for PFET threshold voltage engineering
US9209066B2 (en) * 2013-03-01 2015-12-08 Taiwan Semiconductor Manufacturing Company, Ltd. Isolation structure of semiconductor device
US9099324B2 (en) * 2013-10-24 2015-08-04 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with trench isolation
US9960273B2 (en) * 2015-11-16 2018-05-01 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit structure with substrate isolation and un-doped channel
DE102017126435B4 (de) * 2017-08-31 2022-07-28 Taiwan Semiconductor Manufacturing Company, Ltd. Fin-feldeffekttransistorvorrichtung und verfahren
US10497577B2 (en) 2017-08-31 2019-12-03 Taiwan Semiconductor Manufacturing Company, Ltd. Fin field-effect transistor device and method
US11594597B2 (en) 2019-10-25 2023-02-28 Taiwan Semiconductor Manufacturing Company, Ltd. Selective polysilicon growth for deep trench polysilicon isolation structure
US20240429166A1 (en) * 2023-06-23 2024-12-26 International Business Machines Corporation Trench isolation structures for backside contacts

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5250448A (en) * 1990-01-31 1993-10-05 Kabushiki Kaisha Toshiba Method of fabricating a miniaturized heterojunction bipolar transistor
JP2980497B2 (ja) * 1993-11-15 1999-11-22 株式会社東芝 誘電体分離型バイポーラトランジスタの製造方法
US6399970B2 (en) * 1996-09-17 2002-06-04 Matsushita Electric Industrial Co., Ltd. FET having a Si/SiGeC heterojunction channel
JP3762136B2 (ja) * 1998-04-24 2006-04-05 株式会社東芝 半導体装置
US6274894B1 (en) * 1999-08-17 2001-08-14 Advanced Micro Devices, Inc. Low-bandgap source and drain formation for short-channel MOS transistors

Also Published As

Publication number Publication date
TWI297192B (https=) 2008-05-21
JP2004031559A (ja) 2004-01-29
US6847093B2 (en) 2005-01-25
US20040009636A1 (en) 2004-01-15
KR20040002665A (ko) 2004-01-07
TW200403802A (en) 2004-03-01

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