JP4408832B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4408832B2 JP4408832B2 JP2005147831A JP2005147831A JP4408832B2 JP 4408832 B2 JP4408832 B2 JP 4408832B2 JP 2005147831 A JP2005147831 A JP 2005147831A JP 2005147831 A JP2005147831 A JP 2005147831A JP 4408832 B2 JP4408832 B2 JP 4408832B2
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- semiconductor device
- signal processing
- processing chip
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- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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Description
図4に、本発明をGPS信号の受信装置に適用した実施の形態1に係わる半導体装置の断面概略構造を示す。図4に示されるように、本実施の形態の半導体装置60は、多層基板であるSIP(System In a Package)基板61と、外部から入力されるGPS信号をベースバンドの周波数に変換するRFチップ6と、RFチップから出力される変換信号をベースバンド信号に基づいて規定の信号処理を行うBB(ベースバンド)チップ7とを備えている。SIP(System In a Package)基板61の最上部層の一部には、アナログGNDパターン61aが形成される。また、RFチップ6のRFチップシリコン基板6a上面には、トランジスタ等の回路部が作り込まれるRFチップ活性領域層6bが形成され、BB(ベースバンド)チップ7のBB(ベースバンド)チップシリコン基板7a上面にも、同様にBBチップ活性領域層7bが形成される。
これにより、極めてコンパクトな半導体装置60を実現することができる。
本発明の実施の形態2に係わる半導体装置は、無線信号処理チップとデジタル信号処理チップとを有し、例えば携帯型通信端末のように無線信号で得た情報を内部処理するものである。
2…アンテナ
3…基板
4…フィルタA
5…フィルタB
6…RFチップ
6a…RFチップシリコン基板
6b…RFチップ活性領域層
7…BB(Base Band Chip)チップ
7a…BBチップシリコン基板
7b…BBチップ活性領域層
8…データ信号
9…クロック信号
10…GPS位置情報信号
20…半導体モジュール
21…第1半導体チップ
22…第2半導体チップ
23…モジュール
24…支持
25…放熱パッド
26…ビア
28…ワイヤ
32…外部電極
40…半導体装置
41…RF信号系チップ
42…ベースバンド信号系チップ
45…第2の金属細線
46…第1の金属細線
47…リードフレーム
47a…インナーリード部
47b…アウターリード部
50…第3の金属細線
60…半導体装置
61…SIP基板
61a…アナログGNDパターン
62…インピーダンス整合用回路
63…樹脂スぺーサ
64…ボンディングパッド
65…ワイヤ
66…樹脂モールド
67…パッケージ
68…BGAボール
69…パッシブ素子
Claims (9)
- 表面にグランド領域が形成される基板と、
前記基板の前記グランド領域上に接続されるアナログ系無線信号処理チップと、
前記アナログ系無線信号処理チップ上に、電気的に絶縁されて積層されるデジタル系信号処理チップとを具備する半導体装置。 - 請求項1に記載の半導体装置において、
前記アナログ系無線信号処理チップの上面に無線信号処理を行う半導体活性領域層が形成され、
前記デジタル系信号処理チップの上面にデジタル信号処理を行う半導体活性領域層が形成される半導体装置。 - 請求項1または2に記載の半導体装置において、
前記アナログ系無線信号処理チップと前記デジタル系信号処理チップとの間に絶縁層を具備する半導体装置。 - 請求項1から3までの少なくとも一項に記載の半導体装置において、
前記デジタル系信号処理チップは、前記アナログ系無線信号処理チップの全面を覆うように配置されている半導体装置。 - 請求項4に記載の半導体装置において、
前記基板の最上部層の複数箇所のそれぞれから、前記アナログ系無線信号処理チップおよび前記デジタル系信号処理チップの各々の上面の、前記複数箇所のそれぞれに対応する位置に、導電性ワイヤが接続される半導体装置。 - 請求項1から5までの少なくとも一項に記載の半導体装置において、
前記基板の前記表面層は、前記アナログ系無線信号処理チップの入力端子を有し、前記基板に形成される外部信号の入力端子と前記アナログ系無線信号処理チップの入力端子との間にインピーダンス整合用回路を備える半導体装置。 - 請求項6に記載の半導体装置において、前記外部信号の前記入力端子と前記アナログ系無線信号処理チップの前記入力端子との間に、さらに、前記外部信号のうち特定周波数帯域の信号のみを通過させるための帯域通過フィルターを備える半導体装置。
- 請求項1から7までの少なくとも一項に記載の半導体装置において、
さらに、前記アナログ系無線信号処理チップと前記デジタル系信号処理チップと前記基板とをモールド封止するためのパッケージを具備する半導体装置。 - 請求項1から8までに記載の半導体装置は、携帯端末機器に搭載される半導体装置である半導体装置。
Priority Applications (6)
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JP2005147831A JP4408832B2 (ja) | 2005-05-20 | 2005-05-20 | 半導体装置 |
TW095116427A TW200707699A (en) | 2005-05-20 | 2006-05-09 | Sip type package containing analog semiconductor chip and digital semiconductor chip stacked in order, and method for manufacturing the same |
US11/432,528 US20060261471A1 (en) | 2005-05-20 | 2006-05-12 | SIP type package containing analog semiconductor chip and digital semiconductor chip stacked in order, and method for manufacturing the same |
EP06010256A EP1724833A2 (en) | 2005-05-20 | 2006-05-18 | SIP (system-in-package) type package containing analog semiconductor chip and digital semiconductor chip stacked in order, and method for manufacturing the same |
KR1020060044762A KR100744979B1 (ko) | 2005-05-20 | 2006-05-18 | 아날로그 반도체 칩 및 디지털 반도체 칩이 순서대로적층된 sip 타입 패키지, 및 그 제조 방법 |
CNA2006100848891A CN1866515A (zh) | 2005-05-20 | 2006-05-22 | 包含顺序堆叠的模拟半导体芯片和数字半导体芯片的sip型封装及其制造方法 |
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JP2005147831A JP4408832B2 (ja) | 2005-05-20 | 2005-05-20 | 半導体装置 |
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EP (1) | EP1724833A2 (ja) |
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Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4408832B2 (ja) * | 2005-05-20 | 2010-02-03 | Necエレクトロニクス株式会社 | 半導体装置 |
KR100764682B1 (ko) * | 2006-02-14 | 2007-10-08 | 인티그런트 테크놀로지즈(주) | 집적회로 칩 및 패키지. |
DE102006033175A1 (de) * | 2006-07-18 | 2008-01-24 | Robert Bosch Gmbh | Elektronikanordnung |
CN101150123B (zh) * | 2007-10-31 | 2010-06-02 | 日月光半导体制造股份有限公司 | 具有电磁屏蔽罩盖的半导体封装结构 |
US20110193243A1 (en) * | 2010-02-10 | 2011-08-11 | Qualcomm Incorporated | Unique Package Structure |
CN101908082B (zh) * | 2010-04-30 | 2012-10-24 | 梅州市志浩电子科技有限公司 | 印刷电路板的阻抗设计方法及阻抗设计装置 |
JP5924110B2 (ja) * | 2012-05-11 | 2016-05-25 | 株式会社ソシオネクスト | 半導体装置、半導体装置モジュールおよび半導体装置の製造方法 |
CN103969572B (zh) * | 2013-02-05 | 2017-05-17 | 泰斗微电子科技有限公司 | 一种sip芯片测试平台和方法 |
CN103441124B (zh) * | 2013-08-27 | 2016-01-06 | 矽力杰半导体技术(杭州)有限公司 | 电压调节器的叠层封装方法及相应的叠层封装装置 |
WO2015037390A1 (ja) * | 2013-09-10 | 2015-03-19 | 株式会社村田製作所 | センサモジュール |
TWI553817B (zh) | 2014-06-17 | 2016-10-11 | 瑞昱半導體股份有限公司 | 具有電磁防護功能之積體電路及其製造方法 |
KR20160036945A (ko) * | 2014-09-26 | 2016-04-05 | 삼성전기주식회사 | 인쇄회로기판 및 이를 포함하는 전자부품 패키지 |
CN107530739B (zh) * | 2015-03-26 | 2021-04-27 | 生命技术公司 | 用于处理半导体传感器阵列装置的方法 |
JP2018032680A (ja) * | 2016-08-23 | 2018-03-01 | 日本電信電話株式会社 | 積層集積回路 |
CN106361303A (zh) * | 2016-08-30 | 2017-02-01 | 福州瑞芯微电子股份有限公司 | 血管检测一体化芯片及其实现方法 |
CN106324484B (zh) * | 2016-08-30 | 2019-04-02 | 福州瑞芯微电子股份有限公司 | 芯片的无线调试电路和方法 |
CN106324485B (zh) * | 2016-08-30 | 2019-04-02 | 福州瑞芯微电子股份有限公司 | 芯片的无线测试电路及无线测试方法 |
CN106374962B (zh) * | 2016-08-30 | 2019-03-12 | 福州瑞芯微电子股份有限公司 | 一体化wifi芯片及其封装方法 |
US10332820B2 (en) | 2017-03-20 | 2019-06-25 | Akash Systems, Inc. | Satellite communication transmitter with improved thermal management |
US10374553B2 (en) * | 2017-06-15 | 2019-08-06 | Akash Systems, Inc. | Microwave transmitter with improved information throughput |
US10680633B1 (en) | 2018-12-21 | 2020-06-09 | Analog Devices International Unlimited Compnay | Data acquisition system-in-package |
WO2021034705A1 (en) * | 2019-08-21 | 2021-02-25 | Life Technologies Corporation | Devices incorporating a multilane flow cell |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5399898A (en) * | 1992-07-17 | 1995-03-21 | Lsi Logic Corporation | Multi-chip semiconductor arrangements using flip chip dies |
US5198693A (en) * | 1992-02-05 | 1993-03-30 | International Business Machines Corporation | Aperture formation in aluminum circuit card for enhanced thermal dissipation |
US5285352A (en) * | 1992-07-15 | 1994-02-08 | Motorola, Inc. | Pad array semiconductor device with thermal conductor and process for making the same |
US5642261A (en) * | 1993-12-20 | 1997-06-24 | Sgs-Thomson Microelectronics, Inc. | Ball-grid-array integrated circuit package with solder-connected thermal conductor |
US5858814A (en) * | 1996-07-17 | 1999-01-12 | Lucent Technologies Inc. | Hybrid chip and method therefor |
US6381283B1 (en) * | 1998-10-07 | 2002-04-30 | Controlnet, Inc. | Integrated socket with chip carrier |
JP2000323617A (ja) * | 1999-05-12 | 2000-11-24 | Mitsubishi Electric Corp | 高周波用半導体パッケージ |
JP2001035994A (ja) * | 1999-07-15 | 2001-02-09 | Toshiba Corp | 半導体集積回路装置およびシステム基板 |
US6261869B1 (en) * | 1999-07-30 | 2001-07-17 | Hewlett-Packard Company | Hybrid BGA and QFP chip package assembly and process for same |
US6531784B1 (en) * | 2000-06-02 | 2003-03-11 | Amkor Technology, Inc. | Semiconductor package with spacer strips |
JP3417388B2 (ja) * | 2000-07-19 | 2003-06-16 | 松下電器産業株式会社 | 半導体装置 |
KR100391093B1 (ko) * | 2001-01-04 | 2003-07-12 | 삼성전자주식회사 | 히트 싱크가 부착된 볼 그리드 어레이 패키지 |
US6586825B1 (en) * | 2001-04-26 | 2003-07-01 | Lsi Logic Corporation | Dual chip in package with a wire bonded die mounted to a substrate |
US6867500B2 (en) * | 2002-04-08 | 2005-03-15 | Micron Technology, Inc. | Multi-chip module and methods |
JP2004111656A (ja) * | 2002-09-18 | 2004-04-08 | Nec Electronics Corp | 半導体装置及び半導体装置の製造方法 |
US7479407B2 (en) * | 2002-11-22 | 2009-01-20 | Freescale Semiconductor, Inc. | Digital and RF system and method therefor |
JP2004214249A (ja) * | 2002-12-27 | 2004-07-29 | Renesas Technology Corp | 半導体モジュール |
TWI317549B (en) * | 2003-03-21 | 2009-11-21 | Advanced Semiconductor Eng | Multi-chips stacked package |
JP2004296719A (ja) * | 2003-03-26 | 2004-10-21 | Renesas Technology Corp | 半導体装置 |
TWI278947B (en) * | 2004-01-13 | 2007-04-11 | Samsung Electronics Co Ltd | A multi-chip package, a semiconductor device used therein and manufacturing method thereof |
US7235889B2 (en) * | 2004-09-10 | 2007-06-26 | Lsi Corporation | Integrated heatspreader for use in wire bonded ball grid array semiconductor packages |
JP4748648B2 (ja) * | 2005-03-31 | 2011-08-17 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4408832B2 (ja) * | 2005-05-20 | 2010-02-03 | Necエレクトロニクス株式会社 | 半導体装置 |
-
2005
- 2005-05-20 JP JP2005147831A patent/JP4408832B2/ja not_active Expired - Fee Related
-
2006
- 2006-05-09 TW TW095116427A patent/TW200707699A/zh unknown
- 2006-05-12 US US11/432,528 patent/US20060261471A1/en not_active Abandoned
- 2006-05-18 KR KR1020060044762A patent/KR100744979B1/ko active IP Right Grant
- 2006-05-18 EP EP06010256A patent/EP1724833A2/en not_active Withdrawn
- 2006-05-22 CN CNA2006100848891A patent/CN1866515A/zh active Pending
Also Published As
Publication number | Publication date |
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KR100744979B1 (ko) | 2007-08-02 |
CN1866515A (zh) | 2006-11-22 |
EP1724833A2 (en) | 2006-11-22 |
JP2006324563A (ja) | 2006-11-30 |
KR20060120462A (ko) | 2006-11-27 |
TW200707699A (en) | 2007-02-16 |
US20060261471A1 (en) | 2006-11-23 |
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