JP2000323617A - 高周波用半導体パッケージ - Google Patents

高周波用半導体パッケージ

Info

Publication number
JP2000323617A
JP2000323617A JP11131170A JP13117099A JP2000323617A JP 2000323617 A JP2000323617 A JP 2000323617A JP 11131170 A JP11131170 A JP 11131170A JP 13117099 A JP13117099 A JP 13117099A JP 2000323617 A JP2000323617 A JP 2000323617A
Authority
JP
Japan
Prior art keywords
package
semiconductor element
ground
wire
grounding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11131170A
Other languages
English (en)
Inventor
Katsumi Miyawaki
勝己 宮脇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP11131170A priority Critical patent/JP2000323617A/ja
Priority to US09/377,899 priority patent/US6225693B1/en
Priority to CN99127064A priority patent/CN1133212C/zh
Priority to TW089108595A priority patent/TW448549B/zh
Publication of JP2000323617A publication Critical patent/JP2000323617A/ja
Pending legal-status Critical Current

Links

Classifications

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Abstract

(57)【要約】 【課題】 半導体素子直下の接地領域とパッケージの接
地面にワイヤボンディングされた領域を非常に短距離で
接続でき、高周波特性劣化の原因となるインダクタンス
成分を非常に低く抑えることができる高周波用半導体パ
ッケージを得る。 【解決手段】 接合材６の流れ出しがワイヤボンド不着
にならないように、スリット１０を半導体素子２の外側
に点線状に配置した。

Description

【発明の詳細な説明】
【０００１】
【発明の属する技術分野】この発明は、高周波で動作す
る半導体素子を実装する、低コストかつ低損失パッケー
ジに関するものである。
【０００２】
【従来の技術】半導体デバイスにおいて動作周波数が高
くなってきた場合、半導体素子を正常に動作させるた
め、パッケージの接地面（以下、「ＰＫＧ−ＧＮＤ面」
と略記する）への接合、またパッケージ（以下、「ＰＫ
Ｇ」と略記する）自身の接地（以下、「ＧＮＤ」と略記
する）構造が非常に重要となってくる。従来は半導体素
子のＧＮＤとなる部分から直下にビアホールと言われる
穴を開け、最短でＰＫＧ−ＧＮＤに接合させたり、ま
た、ＧＮＤ面を安定させるためにＰＫＧとしては金属Ｐ
ＫＧ（特にＧＮＤ面）を使用していたりした。
【０００３】しかしここ最近、これら高速で動作するデ
バイスに低価格化の流れがあり、上記に示したような半
導体素子へのビアホールや金属ＰＫＧの適用が困難とな
っており、これに代わりワイヤ結線によるＧＮＤ導通、
セラミックベースＰＫＧへ変化してきている。この中で
動作周波数が１ＧＨｚ以上越えて高くなると、結線ワイ
ヤ自身やＰＫＧ−ＧＮＤ面の配置によっては、ＧＮＤ自
身がＬ成分（インダクタンス）を持ち、特性劣化の原因
となる。
【０００４】ここで図６に従来のＰＫＧ構造を示す。図
６において、１はセラミックＰＫＧ、２は半導体素子、
３は外部回路と半導体素子とを電気的に導通させるイン
ナーリード配線、４は金線、５はセラミック上にメタラ
イズをしたＧＮＤエリア、６は半導体素子２をＰＫＧ１
に接続するための接合材、７は半導体素子２のＧＮＤ端
子を金線４を介してＰＫＧのＧＮＤエリア５にワイヤボ
ンドするに当たり、半導体素子の接合材流れを防止する
ための半田流れ止め（メタライズ抜きパターン）であ
り、その外側にワイヤボンドを行っている。また、図７
はこのＰＫＧの断面図である。
【０００５】
【発明が解決しようとする課題】上記のような従来の高
周波用半導体パッケージは、半導体素子２からＧＮＤメ
タライズ５間までと、ワイヤボンディングから半導体素
子２直下のＧＮＤ面までに図８に示す矢印の様に距離が
あり、これがＬ成分（インダクタンス）となり、半導体
素子２の特性（特にゲイン）低下となるという問題があ
った。
【０００６】この発明はかかる問題点を解決するために
なされたものであり、本発明の目的はＧＮＤにボンディ
ングするワイヤは非常に短距離で半導体素子上ＧＮＤと
ＰＫＧ−ＧＮＤ面を接合でき、また、半導体素子直下の
ＧＮＤエリアとＰＫＧ−ＧＮＤ面にボンディングされた
エリアを非常に短距離で接続でき、高周波特性劣化の原
因となるインダクタンス成分を非常に低く抑えることが
できる高周波用半導体パッケージを提供することであ
る。
【０００７】
【課題を解決するための手段】第１の発明にかかる高周
波用半導体パッケージは、半導体素子上の接地用電極と
パッケージの接地面とを結線する接地用ワイヤの前記パ
ッケージの接地面において、前記パッケージ上にメッキ
を抜いたスリット状の領域を点線状に設けた、前記半導
体素子実装面が接地面となるものである。
【０００８】また、第２の発明にかかる高周波用半導体
パッケージは、パッケージ上の点線状のメッキを抜いた
スリット状の領域が、半導体素子実装時の接合材はみだ
しによるワイヤ不着を防止し、また前記半導体素子直下
の接地領域と前記接地用ワイヤの前記パッケージの接地
領域が非常に短距離となるようにしたものである。
【０００９】さらに、第３の発明にかかる高周波用半導
体パッケージは、半導体素子上の接地用電極からパッケ
ージの接地面を結線する接地用ワイヤの前記パッケージ
側の接地面において、前記パッケージ側の接地面に導電
性接合剤を介した金属のプレートを備え、前記プレート
上に半導体素子上の接地用電極からパッケージの接地面
を結線する接地用ワイヤを接合可能にした、前記半導体
素子実装面が接地面となるものである。
【００１０】また、第４の発明にかかる高周波用半導体
パッケージは、金属のプレートが、半導体素子実装時の
接合材はみだしによるワイヤ不着を防止し、また前記半
導体素子直下の接地領域と前記接地用ワイヤの前記パッ
ケージの接地領域が非常に短距離となるようにしたもの
である。
【００１１】さらに、第５の発明にかかる高周波用半導
体パッケージは、半導体素子上の接地用電極からパッケ
ージの接地面を結線する接地用ワイヤの前記パッケージ
側の接地面において、前記パッケージ側の接地面に横長
の長方形形状の誘電体を設け、前記誘電体の外側であっ
て前記半導体素子の反対側に、半導体素子上の接地用電
極からパッケージの接地面を結線する接地用ワイヤを接
合可能にした、前記半導体素子実装面が接地面となるも
のである。
【００１２】また、第６の発明にかかる高周波用半導体
パッケージは、横長の長方形形状の誘電体が、半導体素
子実装時の接合材はみだしによるワイヤ不着を防止し、
また前記半導体素子直下の接地領域と前記接地用ワイヤ
の前記パッケージの接地領域が非常に短距離となるよう
にしたものである。
【００１３】
【発明の実施の形態】以下、図１から図５を用いて、こ
の発明の実施の形態について説明する。
【００１４】実施の形態１．まず、図１と図２を用い
て、この発明の実施の形態１について説明する。図１
は、この発明の実施の形態１における高周波用半導体パ
ッケージ示す斜視図である。図１を参照して、１はセラ
ミックＰＫＧ、２は５．０ＧＨｚ以上で動作するＧａＡ
ｓ−ＭＭＩＣ等の半導体素子、２ａは半導体素子２上の
接地用電極、３は外部回路と半導体素子とを電気的に導
通させるインナーリード配線、４は接地用ワイヤである
金線、５はセラミック上にメタライズをした、パッケー
ジの接地面であるＧＮＤエリア、６は半導体素子２をＰ
ＫＧ１に接続するための接合材、１０は半導体素子２の
ＧＮＤ端子を金線４を介してＰＫＧのＧＮＤエリア５に
ワイヤボンドする際、接合材６の流れ出しがこのワイヤ
ボンド不着にならないようにスリットを点線上に配置し
たものであり、このスリット１０はＧＮＤ面５のメッキ
を抜いたものであって、そのスリット１つの概略寸法は
長さ約０．３mm×幅約０．１５mmであり、セラミック、
または半田が流れない金属で覆われている。
【００１５】以上説明したように、この実施の形態１に
おける高周波用半導体パッケージによれば、接合材６の
流れ出しがワイヤボンド不着にならないようにスリット
を点線状に配置したので、ＧＮＤにボンディングするワ
イヤは非常に短距離で半導体素子上ＧＮＤとＰＫＧ−Ｇ
ＮＤ面５を接合でき、また半導体素子２直下のＧＮＤエ
リアとＰＫＧ−ＧＮＤ面５にボンディングされたエリア
を、図２の矢印に示すように非常に短距離で接続でき、
高周波特性劣化の原因となるインダクタンス成分を非常
に低く抑えることができる。
【００１６】実施の形態２．この実施の形態２の目的は
前記実施の形態１の目的と同じであって、図３に示すよ
うに半導体素子２の両端に金属のプレート２０を半田付
け、もしくは導電性樹脂で接合させ、この金属プレート
２０上に半導体素子２上のＧＮＤボンディングを行って
いる。この金属プレート２０の材質はFe-Ni-Co合金また
はCu材であり、その最終表面処理はAu蒸着またはAuメッ
キが必要である。また、この金属プレート２０の概略寸
法は、幅約０．３mm×長さ約２．５mm×高さ約０．２mm
であって、これにより半導体素子２の半田流れを防止す
るとともに、半導体素子２上からワイヤボンドされた金
属プレート２０は非常に短距離で、かつインダクタンス
成分を非常に低くしてＰＫＧ−ＧＮＤ面に接続できるた
め、特性劣化の低下を防止することができる。
【００１７】実施の形態３．この実施の形態３の目的は
前記実施の形態１の目的と同じであるが、図４に示すよ
うにＰＫＧ−ＧＮＤ面５で半導体素子を実装する両端に
誘電体３０を設ける。この誘電体３０の概略寸法は、幅
約０．２mm×長さ約２．５mm×高さ約３０〜４０μmで
あって、この誘電体３０の直下は金属面であり、半導体
素子直下とＰＫＧ−ＧＮＤ面にボンディングされたエリ
ヤを非常に短距離で接続でき、高周波特性劣化の原因と
なるインダクタンス成分を非常に低く抑えることができ
るとともに、この図４において誘電体３０はダム状形状
をしているので、接合材の流れを半田材のみならず樹脂
材の様なものでも確実に防止することができる。
【００１８】また、上記実施の形態３では、誘電体はダ
ム状形状である場合について説明したが、前記実施の形
態１の様な点線状のスリットでも、前記実施の形態２の
様な横長の長方形形状であってもよく、上記実施の形態
３と同様な効果を奏する。
【００１９】
【発明の効果】この発明は、以上説明したように構成さ
れているので、以下に示すような効果を奏する。
【００２０】第１、第３および第５の発明によれば、半
導体素子の接合材流れを防止するとともに、接地面にボ
ンディングするワイヤは、半導体素子直下の接地エリア
とパッケージの接地面にボンディングされたエリアを非
常に短距離で接続でき、高周波特性劣化の原因となるイ
ンダクタンス成分を非常に低く抑えることができる。
【００２１】また第２、第４および第６の発明によれ
ば、半導体素子実装時の接合材はみだしによるワイヤ不
着を防止し、また前記半導体素子直下の接地領域と前記
接地用ワイヤの前記パッケージの接地領域が非常に短距
離となるようにできる。
【図面の簡単な説明】
【図１】この発明の実施の形態１における高周波用半導
体パッケージを示す斜視図である。
【図２】この発明の実施の形態１における高周波用半導
体パッケージにおける電流の流れを示す斜視図である。
【図３】この発明の実施の形態２における高周波用半導
体パッケージを示す斜視図である。
【図４】この発明の実施の形態３における高周波用半導
体パッケージを示す斜視図である。
【図５】この発明の実施の形態３における高周波用半導
体パッケージの断面図である。
【図６】従来の高周波用半導体パッケージを示す斜視図
である。
【図７】従来の高周波用半導体パッケージの断面図であ
る。
【図８】従来の高周波用半導体パッケージにおける電流
の流れを示す斜視図である。
【符号の説明】
１ パッケージ ２ 半導体素子 ２ａ 接地用電極 ４ 接地用ワイヤ ５ 接地面 ６ 接合材 １０ スリット状の領域 ２０ 金属のプレート ３０ 誘電体

Claims (6)

    【特許請求の範囲】
  1. 【請求項１】 半導体素子上の接地用電極とパッケージ
    の接地面とを結線する接地用ワイヤの前記パッケージの
    接地面において、前記パッケージ上にメッキを抜いたス
    リット状の領域を点線状に設けた、前記半導体素子実装
    面が接地面となる高周波用半導体パッケージ。
  2. 【請求項２】 パッケージ上の点線状のメッキを抜いた
    スリット状の領域が、半導体素子実装時の接合材はみだ
    しによるワイヤ不着を防止し、また前記半導体素子直下
    の接地領域と前記接地用ワイヤの前記パッケージの接地
    領域が非常に短距離となるようにしたことを特徴とす
    る、請求項１に記載の高周波用半導体セラミックパッケ
    ージ。
  3. 【請求項３】 半導体素子上の接地用電極からパッケー
    ジの接地面を結線する接地用ワイヤの前記パッケージ側
    の接地面において、前記パッケージ側の接地面に導電性
    接合剤を介した金属のプレートを備え、前記プレート上
    に半導体素子上の接地用電極からパッケージの接地面を
    結線する接地用ワイヤを接合可能にした、前記半導体素
    子実装面が接地面となる高周波用半導体パッケージ。
  4. 【請求項４】 金属のプレートが、半導体素子実装時の
    接合材はみだしによるワイヤ不着を防止し、また前記半
    導体素子直下の接地領域と前記接地用ワイヤの前記パッ
    ケージの接地領域が非常に短距離となるようにしたこと
    を特徴とする、請求項３に記載の高周波用半導体セラミ
    ックパッケージ。
  5. 【請求項５】 半導体素子上の接地用電極からパッケー
    ジの接地面を結線する接地用ワイヤの前記パッケージ側
    の接地面において、前記パッケージ側の接地面に横長の
    長方形形状の誘電体を設け、前記誘電体の外側であって
    前記半導体素子の反対側に、半導体素子上の接地用電極
    からパッケージの接地面を結線する接地用ワイヤを接合
    可能にした、前記半導体素子実装面が接地面となる高周
    波用半導体パッケージ。
  6. 【請求項６】 横長の長方形形状の誘電体が、半導体素
    子実装時の接合材はみだしによるワイヤ不着を防止し、
    また前記半導体素子直下の接地領域と前記接地用ワイヤ
    の前記パッケージの接地領域が非常に短距離となるよう
    にしたことを特徴とする、請求項５に記載の高周波用半
    導体セラミックパッケージ。
JP11131170A 1999-05-12 1999-05-12 高周波用半導体パッケージ Pending JP2000323617A (ja)

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JP11131170A JP2000323617A (ja) 1999-05-12 1999-05-12 高周波用半導体パッケージ
US09/377,899 US6225693B1 (en) 1999-05-12 1999-08-20 Semiconductor package for radio frequency
CN99127064A CN1133212C (zh) 1999-05-12 1999-12-24 高频用半导体封装体
TW089108595A TW448549B (en) 1999-05-12 2000-05-05 A semiconductor package for radio frequency

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JP2006524904A (ja) * 2003-02-10 2006-11-02 スカイワークス ソリューションズ，インコーポレイテッド インダクタンスが減少し、ダイ接着剤の流出が減少した半導体ダイパッケージ
JP2007329502A (ja) * 2007-08-16 2007-12-20 Toshiba Corp 発光装置
JP2009065199A (ja) * 2008-11-17 2009-03-26 Toshiba Corp 発光装置
KR20140080575A (ko) * 2012-12-12 2014-07-01 한국전자통신연구원 패키지

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JP4408832B2 (ja) * 2005-05-20 2010-02-03 Ｎｅｃエレクトロニクス株式会社 半導体装置
WO2009146439A1 (en) 2008-05-30 2009-12-03 Colorado State University Research Foundation System, method and apparatus for generating plasma
US8222822B2 (en) 2009-10-27 2012-07-17 Tyco Healthcare Group Lp Inductively-coupled plasma device
FR2962578B1 (fr) * 2010-07-09 2012-08-03 E2V Semiconductors Composant électronique en boitier céramique
CN111599788B (zh) * 2020-05-09 2022-04-01 中国电子科技集团公司第十三研究所 0.5mm节距的高频无引线陶瓷外壳的测试方法

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JPS61101052A (ja) 1984-10-24 1986-05-19 Nec Corp 半導体装置の組立方法
US6001673A (en) * 1999-02-11 1999-12-14 Ericsson Inc. Methods for packaging integrated circuit devices including cavities adjacent active regions

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006524904A (ja) * 2003-02-10 2006-11-02 スカイワークス ソリューションズ，インコーポレイテッド インダクタンスが減少し、ダイ接着剤の流出が減少した半導体ダイパッケージ
JP2007329502A (ja) * 2007-08-16 2007-12-20 Toshiba Corp 発光装置
JP2009065199A (ja) * 2008-11-17 2009-03-26 Toshiba Corp 発光装置
KR20140080575A (ko) * 2012-12-12 2014-07-01 한국전자통신연구원 패키지
KR101991259B1 (ko) * 2012-12-12 2019-06-24 한국전자통신연구원 고전력 소자용 패키지

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CN1274172A (zh) 2000-11-22
CN1133212C (zh) 2003-12-31

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