JP4361807B2 - Soiデバイス、その製造方法 - Google Patents

Soiデバイス、その製造方法 Download PDF

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Publication number
JP4361807B2
JP4361807B2 JP2003579285A JP2003579285A JP4361807B2 JP 4361807 B2 JP4361807 B2 JP 4361807B2 JP 2003579285 A JP2003579285 A JP 2003579285A JP 2003579285 A JP2003579285 A JP 2003579285A JP 4361807 B2 JP4361807 B2 JP 4361807B2
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Japan
Prior art keywords
well
dopant material
type dopant
ion implantation
type
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Expired - Fee Related
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JP2003579285A
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Japanese (ja)
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JP2005521264A (ja
JP2005521264A5 (enExample
Inventor
シー. ウェイ アンディ
ジェイ. リスターズ デリック
ビー. フューズライア マーク
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Advanced Micro Devices Inc
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Advanced Micro Devices Inc
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Publication of JP2005521264A5 publication Critical patent/JP2005521264A5/ja
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6706Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device for preventing leakage current 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6729Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733Multi-gate TFTs
    • H10D30/6734Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6758Thin-film transistors [TFT] characterised by the insulating substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2003579285A 2002-03-21 2002-12-17 Soiデバイス、その製造方法 Expired - Fee Related JP4361807B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/104,939 US6919236B2 (en) 2002-03-21 2002-03-21 Biased, triple-well fully depleted SOI structure, and various methods of making and operating same
PCT/US2002/040398 WO2003081677A1 (en) 2002-03-21 2002-12-17 Based, triple-well fully depleted soi structure, and various methods of making and operating same

Publications (3)

Publication Number Publication Date
JP2005521264A JP2005521264A (ja) 2005-07-14
JP2005521264A5 JP2005521264A5 (enExample) 2006-08-31
JP4361807B2 true JP4361807B2 (ja) 2009-11-11

Family

ID=28040744

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003579285A Expired - Fee Related JP4361807B2 (ja) 2002-03-21 2002-12-17 Soiデバイス、その製造方法

Country Status (9)

Country Link
US (2) US6919236B2 (enExample)
EP (1) EP1488463B1 (enExample)
JP (1) JP4361807B2 (enExample)
KR (1) KR100939094B1 (enExample)
CN (1) CN100346484C (enExample)
AU (1) AU2002361758A1 (enExample)
DE (1) DE60224847T2 (enExample)
TW (1) TWI270983B (enExample)
WO (1) WO2003081677A1 (enExample)

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US7416927B2 (en) * 2002-03-26 2008-08-26 Infineon Technologies Ag Method for producing an SOI field effect transistor
US7115949B2 (en) * 2002-05-30 2006-10-03 Freescale Semiconductor, Inc. Method of forming a semiconductor device in a semiconductor layer and structure thereof
EP1588418A1 (de) * 2003-01-30 2005-10-26 X-FAB Semiconductor Foundries AG Soi struktur mit substratkontakten beidseits der box und herstellungs-verfahren für eine solche struktur
JP2005116623A (ja) * 2003-10-03 2005-04-28 Nec Electronics Corp 半導体装置およびその製造方法
JP4664631B2 (ja) * 2004-08-05 2011-04-06 株式会社東芝 半導体装置及びその製造方法
TWI240370B (en) * 2004-08-26 2005-09-21 Airoha Tech Corp Substrate structure underlying a pad and pad structure
CN101238580B (zh) * 2005-08-18 2010-06-16 富士通微电子株式会社 半导体器件及其制造方法
JP2007115971A (ja) * 2005-10-21 2007-05-10 Fujitsu Ltd 半導体装置とその製造方法
US7442996B2 (en) * 2006-01-20 2008-10-28 International Business Machines Corporation Structure and method for enhanced triple well latchup robustness
DE102007004859A1 (de) * 2007-01-31 2008-08-14 Advanced Micro Devices, Inc., Sunnyvale SOI-Bauelement mit einer Substratdiode mit Prozess toleranter Konfiguration und Verfahren zur Herstellung des SOI-Bauelements
KR101003115B1 (ko) * 2007-12-12 2010-12-21 주식회사 하이닉스반도체 플로팅 바디 캐패시터를 구비한 반도체 메모리 소자 및 그제조방법
US7843005B2 (en) * 2009-02-11 2010-11-30 International Business Machines Corporation SOI radio frequency switch with reduced signal distortion
US8421156B2 (en) * 2010-06-25 2013-04-16 International Business Machines Corporation FET with self-aligned back gate
FR2980640B1 (fr) * 2011-09-26 2014-05-02 Commissariat Energie Atomique Circuit integre en technologie fdsoi avec partage de caisson et moyens de polarisation des plans de masse de dopage opposes presents dans un meme caisson
CN103489779B (zh) 2012-06-12 2016-05-11 中国科学院微电子研究所 半导体结构及其制造方法
US9252228B2 (en) * 2013-11-29 2016-02-02 Qualcomm Incorporated Threshold voltage adjustment in metal oxide semiconductor field effect transistor with silicon oxynitride polysilicon gate stack on fully depleted silicon-on-insulator
US9257353B1 (en) * 2014-10-24 2016-02-09 GlobalFoundries, Inc. Integrated circuits with test structures including bi-directional protection diodes
FR3038775A1 (fr) 2015-07-09 2017-01-13 St Microelectronics Sa Prise de contact substrat pour un transistor mos dans un substrat soi, en particulier fdsoi
US9621033B2 (en) 2015-09-09 2017-04-11 Nxp Usa, Inc. Charge pump circuit for providing multiplied voltage
US9972395B2 (en) * 2015-10-05 2018-05-15 Silicon Storage Technology, Inc. Row and column decoders comprising fully depleted silicon-on-insulator transistors for use in flash memory systems
US10096708B2 (en) * 2016-03-30 2018-10-09 Stmicroelectronics Sa Enhanced substrate contact for MOS transistor in an SOI substrate, in particular an FDSOI substrate
FR3053834B1 (fr) 2016-07-05 2020-06-12 Stmicroelectronics Sa Structure de transistor
US10109620B1 (en) * 2017-07-26 2018-10-23 Globalfoundries Inc. Method for reducing switch on state resistance of switched-capacitor charge pump using self-generated switching back-gate bias voltage
CN109545792B (zh) * 2018-11-29 2022-01-04 上海华力微电子有限公司 一种sonos存储结构及其制造方法
US11444160B2 (en) 2020-12-11 2022-09-13 Globalfoundries U.S. Inc. Integrated circuit (IC) structure with body contact to well with multiple diode junctions
CN113594161B (zh) * 2021-07-30 2024-08-23 锐立平芯微电子(广州)有限责任公司 半导体器件及其制作方法
CN118431316B (zh) * 2024-07-05 2024-10-18 武汉新芯集成电路股份有限公司 半导体器件及其制造方法

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US5359219A (en) * 1992-12-04 1994-10-25 Texas Instruments Incorporated Silicon on insulator device comprising improved substrate doping
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Also Published As

Publication number Publication date
JP2005521264A (ja) 2005-07-14
AU2002361758A1 (en) 2003-10-08
CN1623238A (zh) 2005-06-01
DE60224847D1 (de) 2008-03-13
US20030178622A1 (en) 2003-09-25
WO2003081677A1 (en) 2003-10-02
TWI270983B (en) 2007-01-11
DE60224847T2 (de) 2009-02-05
TW200307369A (en) 2003-12-01
KR20040108678A (ko) 2004-12-24
US7180136B2 (en) 2007-02-20
US6919236B2 (en) 2005-07-19
CN100346484C (zh) 2007-10-31
US20050184341A1 (en) 2005-08-25
KR100939094B1 (ko) 2010-01-28
EP1488463B1 (en) 2008-01-23
EP1488463A1 (en) 2004-12-22

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