JP4330821B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP4330821B2
JP4330821B2 JP2001203647A JP2001203647A JP4330821B2 JP 4330821 B2 JP4330821 B2 JP 4330821B2 JP 2001203647 A JP2001203647 A JP 2001203647A JP 2001203647 A JP2001203647 A JP 2001203647A JP 4330821 B2 JP4330821 B2 JP 4330821B2
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JP
Japan
Prior art keywords
chip
wafer
manufacturing
sealing material
bumps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP2001203647A
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English (en)
Japanese (ja)
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JP2003017513A5 (enExample
JP2003017513A (ja
Inventor
真也 田久
哲也 黒澤
美佳 桐谷
晃成 高野
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Toshiba Corp
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Toshiba Corp
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Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2001203647A priority Critical patent/JP4330821B2/ja
Priority to TW091114071A priority patent/TW546813B/zh
Priority to KR10-2002-0038237A priority patent/KR100481658B1/ko
Priority to US10/187,629 priority patent/US6777313B2/en
Publication of JP2003017513A publication Critical patent/JP2003017513A/ja
Publication of JP2003017513A5 publication Critical patent/JP2003017513A5/ja
Application granted granted Critical
Publication of JP4330821B2 publication Critical patent/JP4330821B2/ja
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    • H10P72/7402—
    • H10W90/00—
    • H10W74/012—
    • H10W74/15—
    • H10P72/7416—
    • H10W72/01331—
    • H10W72/07236—
    • H10W72/073—
    • H10W72/352—
    • H10W72/856—
    • H10W90/724—
    • H10W90/734—

Landscapes

  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2001203647A 2001-07-04 2001-07-04 半導体装置の製造方法 Expired - Fee Related JP4330821B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001203647A JP4330821B2 (ja) 2001-07-04 2001-07-04 半導体装置の製造方法
TW091114071A TW546813B (en) 2001-07-04 2002-06-26 Manufacturing method of semiconductor device for die reinforcement during picking using sealing material
KR10-2002-0038237A KR100481658B1 (ko) 2001-07-04 2002-07-03 밀봉재를 이용하여 픽업시의 칩의 보강을 행하는 반도체장치의 제조 방법
US10/187,629 US6777313B2 (en) 2001-07-04 2002-07-03 Semiconductor device manufacturing method for reinforcing chip by use of seal member at pickup time

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001203647A JP4330821B2 (ja) 2001-07-04 2001-07-04 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2003017513A JP2003017513A (ja) 2003-01-17
JP2003017513A5 JP2003017513A5 (enExample) 2005-10-27
JP4330821B2 true JP4330821B2 (ja) 2009-09-16

Family

ID=19040245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001203647A Expired - Fee Related JP4330821B2 (ja) 2001-07-04 2001-07-04 半導体装置の製造方法

Country Status (4)

Country Link
US (1) US6777313B2 (enExample)
JP (1) JP4330821B2 (enExample)
KR (1) KR100481658B1 (enExample)
TW (1) TW546813B (enExample)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6794751B2 (en) * 2001-06-29 2004-09-21 Intel Corporation Multi-purpose planarizing/back-grind/pre-underfill arrangements for bumped wafers and dies
US6649445B1 (en) * 2002-09-11 2003-11-18 Motorola, Inc. Wafer coating and singulation method
US8026126B2 (en) * 2002-11-27 2011-09-27 Asm Assembly Automation Ltd Apparatus and method for thin die detachment
JP4599075B2 (ja) * 2003-03-26 2010-12-15 株式会社東芝 半導体製造装置及び半導体装置の製造方法
SG116533A1 (en) * 2003-03-26 2005-11-28 Toshiba Kk Semiconductor manufacturing apparatus and method of manufacturing semiconductor device.
JP2004311576A (ja) 2003-04-03 2004-11-04 Toshiba Corp 半導体装置の製造方法
JP2004335916A (ja) * 2003-05-12 2004-11-25 Toshiba Corp 半導体装置の製造方法
JP4342832B2 (ja) * 2003-05-16 2009-10-14 株式会社東芝 半導体装置およびその製造方法
JP2005019667A (ja) * 2003-06-26 2005-01-20 Disco Abrasive Syst Ltd レーザ光線を利用した半導体ウエーハの分割方法
JP4406300B2 (ja) 2004-02-13 2010-01-27 株式会社東芝 半導体装置及びその製造方法
JP4515129B2 (ja) * 2004-03-26 2010-07-28 シャープ株式会社 半導体装置の製造方法
KR100574983B1 (ko) 2004-07-06 2006-05-02 삼성전자주식회사 반도체소자 제조를 위한 반도체웨이퍼 처리방법
US20060019468A1 (en) * 2004-07-21 2006-01-26 Beatty John J Method of manufacturing a plurality of electronic assemblies
US8124455B2 (en) * 2005-04-02 2012-02-28 Stats Chippac Ltd. Wafer strength reinforcement system for ultra thin wafer thinning
JP2007266191A (ja) * 2006-03-28 2007-10-11 Nec Electronics Corp ウェハ処理方法
JP5151104B2 (ja) * 2006-09-22 2013-02-27 パナソニック株式会社 電子部品の製造方法
JP2008305833A (ja) * 2007-06-05 2008-12-18 Disco Abrasive Syst Ltd ウェーハの加工方法
JP5032231B2 (ja) * 2007-07-23 2012-09-26 リンテック株式会社 半導体装置の製造方法
KR20100065185A (ko) * 2007-10-09 2010-06-15 히다치 가세고교 가부시끼가이샤 접착 필름이 부착된 반도체칩의 제조 방법 및 이 제조 방법에 사용되는 반도체용 접착 필름, 및 반도체 장치의 제조 방법
JP5353703B2 (ja) * 2007-10-09 2013-11-27 日立化成株式会社 接着フィルム付き半導体チップの製造方法及びこの製造方法に用いられる半導体用接着フィルム、並びに、半導体装置の製造方法
JP5493311B2 (ja) * 2008-03-26 2014-05-14 日立化成株式会社 半導体ウエハのダイシング方法及びこれを用いた半導体装置の製造方法
JP5710098B2 (ja) * 2008-03-27 2015-04-30 日立化成株式会社 半導体装置の製造方法
US20100264566A1 (en) * 2009-03-17 2010-10-21 Suss Microtec Inc Rapid fabrication of a microelectronic temporary support for inorganic substrates
US8148239B2 (en) * 2009-12-23 2012-04-03 Intel Corporation Offset field grid for efficient wafer layout
US9064686B2 (en) 2010-04-15 2015-06-23 Suss Microtec Lithography, Gmbh Method and apparatus for temporary bonding of ultra thin wafers
WO2011156228A2 (en) 2010-06-08 2011-12-15 Henkel Corporation Coating adhesives onto dicing before grinding and micro-fabricated wafers
KR101960982B1 (ko) 2011-02-01 2019-07-15 헨켈 아이피 앤드 홀딩 게엠베하 사전 절단되어 웨이퍼상에 도포된 언더필 필름
EP2671248A4 (en) 2011-02-01 2015-10-07 Henkel Corp ON A PRECUTED WAFER APPLIED FILM ON A DICING TAPE
EP2737522A4 (en) * 2011-07-29 2015-03-18 Henkel IP & Holding GmbH CUTTING BEFORE GRINDING AFTER A COATING PROCESS
JP5810958B2 (ja) 2012-02-17 2015-11-11 富士通株式会社 半導体装置の製造方法及び電子装置の製造方法
JP5810957B2 (ja) 2012-02-17 2015-11-11 富士通株式会社 半導体装置の製造方法及び電子装置の製造方法
JP6030938B2 (ja) * 2012-12-07 2016-11-24 リンテック株式会社 シート貼付装置およびシート貼付方法
US9466585B1 (en) * 2015-03-21 2016-10-11 Nxp B.V. Reducing defects in wafer level chip scale package (WLCSP) devices
CN113454758B (zh) * 2019-02-25 2024-04-26 三菱电机株式会社 半导体元件的制造方法
CN110010550B (zh) * 2019-04-18 2021-01-22 京东方科技集团股份有限公司 一种阵列基板制备方法及显示面板制备方法
KR102045187B1 (ko) 2019-06-26 2019-12-02 (주)인암 다용도 핸드 호이스트 장치

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3007497B2 (ja) * 1992-11-11 2000-02-07 三菱電機株式会社 半導体集積回路装置、その製造方法、及びその実装方法
JPH07161764A (ja) 1993-12-03 1995-06-23 Toshiba Corp 樹脂封止型半導体装置およびその製造方法
US6184109B1 (en) * 1997-07-23 2001-02-06 Kabushiki Kaisha Toshiba Method of dividing a wafer and method of manufacturing a semiconductor device
JPH1140520A (ja) 1997-07-23 1999-02-12 Toshiba Corp ウェーハの分割方法及び半導体装置の製造方法
US6294439B1 (en) * 1997-07-23 2001-09-25 Kabushiki Kaisha Toshiba Method of dividing a wafer and method of manufacturing a semiconductor device
US6063646A (en) * 1998-10-06 2000-05-16 Japan Rec Co., Ltd. Method for production of semiconductor package
JP4040819B2 (ja) 1999-02-03 2008-01-30 株式会社東芝 ウェーハの分割方法及び半導体装置の製造方法
JP2000294607A (ja) * 1999-04-08 2000-10-20 Hitachi Ltd 半導体装置の製造方法
JP3423245B2 (ja) 1999-04-09 2003-07-07 沖電気工業株式会社 半導体装置及びその実装方法
KR20000066816A (ko) * 1999-04-21 2000-11-15 최완균 적층 칩 패키지의 제조 방법
JP2001094005A (ja) * 1999-09-22 2001-04-06 Oki Electric Ind Co Ltd 半導体装置及び半導体装置の製造方法

Also Published As

Publication number Publication date
TW546813B (en) 2003-08-11
US6777313B2 (en) 2004-08-17
KR100481658B1 (ko) 2005-04-08
KR20030004132A (ko) 2003-01-14
US20030017663A1 (en) 2003-01-23
JP2003017513A (ja) 2003-01-17

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