JP4330821B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP4330821B2
JP4330821B2 JP2001203647A JP2001203647A JP4330821B2 JP 4330821 B2 JP4330821 B2 JP 4330821B2 JP 2001203647 A JP2001203647 A JP 2001203647A JP 2001203647 A JP2001203647 A JP 2001203647A JP 4330821 B2 JP4330821 B2 JP 4330821B2
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JP
Japan
Prior art keywords
chip
wafer
manufacturing
sealing material
bumps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2001203647A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003017513A (ja
JP2003017513A5 (enExample
Inventor
真也 田久
哲也 黒澤
美佳 桐谷
晃成 高野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2001203647A priority Critical patent/JP4330821B2/ja
Priority to TW091114071A priority patent/TW546813B/zh
Priority to US10/187,629 priority patent/US6777313B2/en
Priority to KR10-2002-0038237A priority patent/KR100481658B1/ko
Publication of JP2003017513A publication Critical patent/JP2003017513A/ja
Publication of JP2003017513A5 publication Critical patent/JP2003017513A5/ja
Application granted granted Critical
Publication of JP4330821B2 publication Critical patent/JP4330821B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7402—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7416—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01331—Manufacture or treatment of die-attach connectors using blanket deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/853—On the same surface
    • H10W72/856—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Dicing (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2001203647A 2001-07-04 2001-07-04 半導体装置の製造方法 Expired - Fee Related JP4330821B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001203647A JP4330821B2 (ja) 2001-07-04 2001-07-04 半導体装置の製造方法
TW091114071A TW546813B (en) 2001-07-04 2002-06-26 Manufacturing method of semiconductor device for die reinforcement during picking using sealing material
US10/187,629 US6777313B2 (en) 2001-07-04 2002-07-03 Semiconductor device manufacturing method for reinforcing chip by use of seal member at pickup time
KR10-2002-0038237A KR100481658B1 (ko) 2001-07-04 2002-07-03 밀봉재를 이용하여 픽업시의 칩의 보강을 행하는 반도체장치의 제조 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001203647A JP4330821B2 (ja) 2001-07-04 2001-07-04 半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2003017513A JP2003017513A (ja) 2003-01-17
JP2003017513A5 JP2003017513A5 (enExample) 2005-10-27
JP4330821B2 true JP4330821B2 (ja) 2009-09-16

Family

ID=19040245

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001203647A Expired - Fee Related JP4330821B2 (ja) 2001-07-04 2001-07-04 半導体装置の製造方法

Country Status (4)

Country Link
US (1) US6777313B2 (enExample)
JP (1) JP4330821B2 (enExample)
KR (1) KR100481658B1 (enExample)
TW (1) TW546813B (enExample)

Families Citing this family (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6794751B2 (en) * 2001-06-29 2004-09-21 Intel Corporation Multi-purpose planarizing/back-grind/pre-underfill arrangements for bumped wafers and dies
US6649445B1 (en) * 2002-09-11 2003-11-18 Motorola, Inc. Wafer coating and singulation method
US8026126B2 (en) * 2002-11-27 2011-09-27 Asm Assembly Automation Ltd Apparatus and method for thin die detachment
SG116533A1 (en) * 2003-03-26 2005-11-28 Toshiba Kk Semiconductor manufacturing apparatus and method of manufacturing semiconductor device.
JP4599075B2 (ja) * 2003-03-26 2010-12-15 株式会社東芝 半導体製造装置及び半導体装置の製造方法
JP2004311576A (ja) 2003-04-03 2004-11-04 Toshiba Corp 半導体装置の製造方法
JP2004335916A (ja) * 2003-05-12 2004-11-25 Toshiba Corp 半導体装置の製造方法
JP4342832B2 (ja) * 2003-05-16 2009-10-14 株式会社東芝 半導体装置およびその製造方法
JP2005019667A (ja) * 2003-06-26 2005-01-20 Disco Abrasive Syst Ltd レーザ光線を利用した半導体ウエーハの分割方法
JP4406300B2 (ja) 2004-02-13 2010-01-27 株式会社東芝 半導体装置及びその製造方法
JP4515129B2 (ja) * 2004-03-26 2010-07-28 シャープ株式会社 半導体装置の製造方法
KR100574983B1 (ko) 2004-07-06 2006-05-02 삼성전자주식회사 반도체소자 제조를 위한 반도체웨이퍼 처리방법
US20060019468A1 (en) 2004-07-21 2006-01-26 Beatty John J Method of manufacturing a plurality of electronic assemblies
US8124455B2 (en) * 2005-04-02 2012-02-28 Stats Chippac Ltd. Wafer strength reinforcement system for ultra thin wafer thinning
JP2007266191A (ja) * 2006-03-28 2007-10-11 Nec Electronics Corp ウェハ処理方法
JP5151104B2 (ja) * 2006-09-22 2013-02-27 パナソニック株式会社 電子部品の製造方法
JP2008305833A (ja) * 2007-06-05 2008-12-18 Disco Abrasive Syst Ltd ウェーハの加工方法
JP5032231B2 (ja) * 2007-07-23 2012-09-26 リンテック株式会社 半導体装置の製造方法
CN101821833B (zh) * 2007-10-09 2012-04-04 日立化成工业株式会社 半导体用粘接膜、以及半导体芯片、半导体装置的制造方法
CN101821834A (zh) * 2007-10-09 2010-09-01 日立化成工业株式会社 带粘接膜半导体芯片的制造方法及用于该制造方法的半导体用粘接膜、以及半导体装置的制造方法
JP5493311B2 (ja) * 2008-03-26 2014-05-14 日立化成株式会社 半導体ウエハのダイシング方法及びこれを用いた半導体装置の製造方法
JP5710098B2 (ja) * 2008-03-27 2015-04-30 日立化成株式会社 半導体装置の製造方法
US20100264566A1 (en) * 2009-03-17 2010-10-21 Suss Microtec Inc Rapid fabrication of a microelectronic temporary support for inorganic substrates
US8148239B2 (en) * 2009-12-23 2012-04-03 Intel Corporation Offset field grid for efficient wafer layout
US9064686B2 (en) 2010-04-15 2015-06-23 Suss Microtec Lithography, Gmbh Method and apparatus for temporary bonding of ultra thin wafers
JP5993845B2 (ja) 2010-06-08 2016-09-14 ヘンケル アイピー アンド ホールディング ゲゼルシャフト ミット ベシュレンクテル ハフツング 先ダイシング法を行う微細加工されたウェーハへの接着剤の被覆
WO2012106223A2 (en) 2011-02-01 2012-08-09 Henkel Corporation Pre-cut wafer applied underfill film on dicing tape
WO2012106191A2 (en) 2011-02-01 2012-08-09 Henkel Corporation Pre- cut wafer applied underfill film
CN103999203A (zh) * 2011-07-29 2014-08-20 汉高知识产权控股有限责任公司 在涂布后研磨前切割
JP5810958B2 (ja) 2012-02-17 2015-11-11 富士通株式会社 半導体装置の製造方法及び電子装置の製造方法
JP5810957B2 (ja) 2012-02-17 2015-11-11 富士通株式会社 半導体装置の製造方法及び電子装置の製造方法
JP6030938B2 (ja) * 2012-12-07 2016-11-24 リンテック株式会社 シート貼付装置およびシート貼付方法
US9466585B1 (en) * 2015-03-21 2016-10-11 Nxp B.V. Reducing defects in wafer level chip scale package (WLCSP) devices
CN113454758B (zh) * 2019-02-25 2024-04-26 三菱电机株式会社 半导体元件的制造方法
CN110010550B (zh) * 2019-04-18 2021-01-22 京东方科技集团股份有限公司 一种阵列基板制备方法及显示面板制备方法
KR102045187B1 (ko) 2019-06-26 2019-12-02 (주)인암 다용도 핸드 호이스트 장치

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3007497B2 (ja) * 1992-11-11 2000-02-07 三菱電機株式会社 半導体集積回路装置、その製造方法、及びその実装方法
JPH07161764A (ja) 1993-12-03 1995-06-23 Toshiba Corp 樹脂封止型半導体装置およびその製造方法
JPH1140520A (ja) 1997-07-23 1999-02-12 Toshiba Corp ウェーハの分割方法及び半導体装置の製造方法
US6184109B1 (en) * 1997-07-23 2001-02-06 Kabushiki Kaisha Toshiba Method of dividing a wafer and method of manufacturing a semiconductor device
US6294439B1 (en) * 1997-07-23 2001-09-25 Kabushiki Kaisha Toshiba Method of dividing a wafer and method of manufacturing a semiconductor device
US6063646A (en) * 1998-10-06 2000-05-16 Japan Rec Co., Ltd. Method for production of semiconductor package
JP4040819B2 (ja) 1999-02-03 2008-01-30 株式会社東芝 ウェーハの分割方法及び半導体装置の製造方法
JP2000294607A (ja) * 1999-04-08 2000-10-20 Hitachi Ltd 半導体装置の製造方法
JP3423245B2 (ja) 1999-04-09 2003-07-07 沖電気工業株式会社 半導体装置及びその実装方法
KR20000066816A (ko) * 1999-04-21 2000-11-15 최완균 적층 칩 패키지의 제조 방법
JP2001094005A (ja) * 1999-09-22 2001-04-06 Oki Electric Ind Co Ltd 半導体装置及び半導体装置の製造方法

Also Published As

Publication number Publication date
TW546813B (en) 2003-08-11
US6777313B2 (en) 2004-08-17
KR100481658B1 (ko) 2005-04-08
JP2003017513A (ja) 2003-01-17
KR20030004132A (ko) 2003-01-14
US20030017663A1 (en) 2003-01-23

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