JP4286733B2 - インターポーザおよびインターポーザの製造方法 - Google Patents

インターポーザおよびインターポーザの製造方法 Download PDF

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Publication number
JP4286733B2
JP4286733B2 JP2004199870A JP2004199870A JP4286733B2 JP 4286733 B2 JP4286733 B2 JP 4286733B2 JP 2004199870 A JP2004199870 A JP 2004199870A JP 2004199870 A JP2004199870 A JP 2004199870A JP 4286733 B2 JP4286733 B2 JP 4286733B2
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JP
Japan
Prior art keywords
hole
opening area
interposer
substrate
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004199870A
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English (en)
Japanese (ja)
Other versions
JP2006024652A (ja
JP2006024652A5 (enExample
Inventor
健一 加川
智久 星野
正巳 八壁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to JP2004199870A priority Critical patent/JP4286733B2/ja
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Priority to EP05765494A priority patent/EP1783832A4/en
Priority to KR1020067004600A priority patent/KR100786156B1/ko
Priority to PCT/JP2005/012424 priority patent/WO2006004127A1/ja
Priority to CN200810089719.1A priority patent/CN101256999B/zh
Priority to KR1020077014093A priority patent/KR100786166B1/ko
Priority to US11/631,635 priority patent/US20080067073A1/en
Priority to TW094122867A priority patent/TW200614896A/zh
Publication of JP2006024652A publication Critical patent/JP2006024652A/ja
Publication of JP2006024652A5 publication Critical patent/JP2006024652A5/ja
Application granted granted Critical
Publication of JP4286733B2 publication Critical patent/JP4286733B2/ja
Priority to US13/328,710 priority patent/US20120085655A1/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H10W20/211—Through-semiconductor vias, e.g. TSVs
    • H10W20/212—Top-view shapes or dispositions, e.g. top-view layouts of the vias
    • H10W20/2125—Top-view shapes

Landscapes

  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2004199870A 2004-07-06 2004-07-06 インターポーザおよびインターポーザの製造方法 Expired - Fee Related JP4286733B2 (ja)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP2004199870A JP4286733B2 (ja) 2004-07-06 2004-07-06 インターポーザおよびインターポーザの製造方法
KR1020067004600A KR100786156B1 (ko) 2004-07-06 2005-07-05 인터포저 및 인터포저의 제조 방법
PCT/JP2005/012424 WO2006004127A1 (ja) 2004-07-06 2005-07-05 インターポーザおよびインターポーザの製造方法
CN200810089719.1A CN101256999B (zh) 2004-07-06 2005-07-05 互连导电层及互连导电层的制造方法
KR1020077014093A KR100786166B1 (ko) 2004-07-06 2005-07-05 인터포저 및 인터포저의 제조 방법
US11/631,635 US20080067073A1 (en) 2004-07-06 2005-07-05 Interposer And Manufacturing Method For The Same
EP05765494A EP1783832A4 (en) 2004-07-06 2005-07-05 INTERPOSER AND METHOD FOR PRODUCING AN INTERPOSER
TW094122867A TW200614896A (en) 2004-07-06 2005-07-06 Interposer and interposer producing method
US13/328,710 US20120085655A1 (en) 2004-07-06 2011-12-16 Interposer and manufacturing method for the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004199870A JP4286733B2 (ja) 2004-07-06 2004-07-06 インターポーザおよびインターポーザの製造方法

Publications (3)

Publication Number Publication Date
JP2006024652A JP2006024652A (ja) 2006-01-26
JP2006024652A5 JP2006024652A5 (enExample) 2006-03-09
JP4286733B2 true JP4286733B2 (ja) 2009-07-01

Family

ID=35797730

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004199870A Expired - Fee Related JP4286733B2 (ja) 2004-07-06 2004-07-06 インターポーザおよびインターポーザの製造方法

Country Status (1)

Country Link
JP (1) JP4286733B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8685518B2 (en) 2011-03-08 2014-04-01 Panasonic Corporation Information recording medium and method for producing same

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008066481A (ja) * 2006-09-06 2008-03-21 Shinko Electric Ind Co Ltd パッケージ、半導体装置、パッケージの製造方法及び半導体装置の製造方法
US8736066B2 (en) * 2010-12-02 2014-05-27 Tessera, Inc. Stacked microelectronic assemby with TSVS formed in stages and carrier above chip
US8587126B2 (en) 2010-12-02 2013-11-19 Tessera, Inc. Stacked microelectronic assembly with TSVs formed in stages with plural active chips
JP6690142B2 (ja) * 2015-07-09 2020-04-28 大日本印刷株式会社 貫通電極基板、貫通電極基板の製造方法及び貫通電極基板を用いたインターポーザ
JP6341245B2 (ja) * 2016-09-05 2018-06-13 大日本印刷株式会社 貫通電極基板の製造方法、貫通電極基板および半導体装置
JP7022365B2 (ja) * 2017-03-24 2022-02-18 大日本印刷株式会社 貫通電極基板及びその製造方法
JP2018195661A (ja) * 2017-05-16 2018-12-06 大日本印刷株式会社 貫通電極基板、貫通電極基板の製造方法及び貫通電極基板を用いた半導体装置
US11078112B2 (en) * 2017-05-25 2021-08-03 Corning Incorporated Silica-containing substrates with vias having an axially variable sidewall taper and methods for forming the same
JP6369653B1 (ja) * 2018-05-17 2018-08-08 大日本印刷株式会社 貫通電極基板および半導体装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8685518B2 (en) 2011-03-08 2014-04-01 Panasonic Corporation Information recording medium and method for producing same

Also Published As

Publication number Publication date
JP2006024652A (ja) 2006-01-26

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