JP4285954B2 - 埋め込み強誘電体デバイス製作プロセスのための汚染コントロール方法 - Google Patents

埋め込み強誘電体デバイス製作プロセスのための汚染コントロール方法 Download PDF

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JP4285954B2
JP4285954B2 JP2002232065A JP2002232065A JP4285954B2 JP 4285954 B2 JP4285954 B2 JP 4285954B2 JP 2002232065 A JP2002232065 A JP 2002232065A JP 2002232065 A JP2002232065 A JP 2002232065A JP 4285954 B2 JP4285954 B2 JP 4285954B2
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substrate
ferroelectric
edge
layer
sacrificial layer
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Expired - Fee Related
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JP2003158115A5 (enExample
JP2003158115A (ja
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スティーブン・アール・ギルバート
トレース・キュー・ハード
ローラ・ダブリュ・ミルカリミ
スコット・サマーフェルト
ルイジ・コロンボ
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Agilent Technologies Inc
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Agilent Technologies Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67017—Apparatus for fluid treatment
    • H01L21/67063—Apparatus for fluid treatment for etching
    • H01L21/67075—Apparatus for fluid treatment for etching for wet etching
    • H01L21/6708—Apparatus for fluid treatment for etching for wet etching using mainly spraying means, e.g. nozzles
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H01L21/31122—Etching inorganic layers by chemical means by dry-etching of layers not containing Si, e.g. PZT, Al2O3
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/201—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits
    • H10D84/204—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors
    • H10D84/212—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D1/00 or H10D8/00, e.g. RLC circuits of combinations of diodes or capacitors or resistors of only capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Memories (AREA)
  • Weting (AREA)
JP2002232065A 2001-08-08 2002-08-08 埋め込み強誘電体デバイス製作プロセスのための汚染コントロール方法 Expired - Fee Related JP4285954B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/925201 2001-08-08
US09/925,201 US6709875B2 (en) 2001-08-08 2001-08-08 Contamination control for embedded ferroelectric device fabrication processes

Publications (3)

Publication Number Publication Date
JP2003158115A JP2003158115A (ja) 2003-05-30
JP2003158115A5 JP2003158115A5 (enExample) 2005-10-27
JP4285954B2 true JP4285954B2 (ja) 2009-06-24

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JP2002232065A Expired - Fee Related JP4285954B2 (ja) 2001-08-08 2002-08-08 埋め込み強誘電体デバイス製作プロセスのための汚染コントロール方法

Country Status (4)

Country Link
US (1) US6709875B2 (enExample)
JP (1) JP4285954B2 (enExample)
KR (1) KR100880109B1 (enExample)
DE (1) DE10231192A1 (enExample)

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* Cited by examiner, † Cited by third party
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JP5132859B2 (ja) * 2001-08-24 2013-01-30 ステラケミファ株式会社 多成分を有するガラス基板用の微細加工表面処理液
US6767750B2 (en) * 2001-12-31 2004-07-27 Texas Instruments Incorporated Detection of AIOx ears for process control in FeRAM processing
JP2004087691A (ja) * 2002-08-26 2004-03-18 Fujitsu Ltd ゲート絶縁膜を除去する方法
US6876021B2 (en) * 2002-11-25 2005-04-05 Texas Instruments Incorporated Use of amorphous aluminum oxide on a capacitor sidewall for use as a hydrogen barrier
KR100504693B1 (ko) * 2003-02-10 2005-08-03 삼성전자주식회사 강유전체 메모리 소자 및 그 제조방법
US20050037521A1 (en) * 2003-08-15 2005-02-17 Uwe Wellhausen Methods and apparatus for processing semiconductor devices by gas annealing
WO2005067051A1 (ja) * 2003-12-26 2005-07-21 Fujitsu Limited 半導体装置、半導体装置の製造方法
US7180141B2 (en) * 2004-12-03 2007-02-20 Texas Instruments Incorporated Ferroelectric capacitor with parallel resistance for ferroelectric memory
KR100722128B1 (ko) * 2005-12-28 2007-05-25 동부일렉트로닉스 주식회사 반도체 소자 제조방법
US7572698B2 (en) * 2006-05-30 2009-08-11 Texas Instruments Incorporated Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean
JP5109395B2 (ja) * 2007-02-14 2012-12-26 富士通セミコンダクター株式会社 半導体装置及びその製造方法
US8320178B2 (en) * 2009-07-02 2012-11-27 Actel Corporation Push-pull programmable logic device cell
US20110297088A1 (en) * 2010-06-04 2011-12-08 Texas Instruments Incorporated Thin edge carrier ring
CN103087718B (zh) * 2013-01-16 2014-12-31 四川大学 湿法刻蚀镍酸镧薄膜和铁电薄膜/镍酸镧复合薄膜的腐蚀液及其制备方法
US9041919B2 (en) 2013-02-18 2015-05-26 Globalfoundries Inc. Infrared-based metrology for detection of stress and defects around through silicon vias
JP2016184677A (ja) * 2015-03-26 2016-10-20 株式会社ユーテック 強誘電体膜の製造方法
JP2017098367A (ja) * 2015-11-20 2017-06-01 東京エレクトロン株式会社 基板処理方法

Family Cites Families (18)

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US5046043A (en) 1987-10-08 1991-09-03 National Semiconductor Corporation Ferroelectric capacitor and memory cell including barrier and isolation layers
US5258093A (en) * 1992-12-21 1993-11-02 Motorola, Inc. Procss for fabricating a ferroelectric capacitor in a semiconductor device
US6051858A (en) 1996-07-26 2000-04-18 Symetrix Corporation Ferroelectric/high dielectric constant integrated circuit and method of fabricating same
US6114254A (en) 1996-10-15 2000-09-05 Micron Technology, Inc. Method for removing contaminants from a semiconductor wafer
US5807774A (en) 1996-12-06 1998-09-15 Sharp Kabushiki Kaisha Simple method of fabricating ferroelectric capacitors
US5773314A (en) 1997-04-25 1998-06-30 Motorola, Inc. Plug protection process for use in the manufacture of embedded dynamic random access memory (DRAM) cells
JPH10340893A (ja) * 1997-06-09 1998-12-22 Sony Corp 電子薄膜材料のエッチング方法
US6143476A (en) 1997-12-12 2000-11-07 Applied Materials Inc Method for high temperature etching of patterned layers using an organic mask stack
US6225156B1 (en) * 1998-04-17 2001-05-01 Symetrix Corporation Ferroelectric integrated circuit having low sensitivity to hydrogen exposure and method for fabricating same
US6174735B1 (en) 1998-10-23 2001-01-16 Ramtron International Corporation Method of manufacturing ferroelectric memory device useful for preventing hydrogen line degradation
US6140672A (en) * 1999-03-05 2000-10-31 Symetrix Corporation Ferroelectric field effect transistor having a gate electrode being electrically connected to the bottom electrode of a ferroelectric capacitor
JP3395696B2 (ja) * 1999-03-15 2003-04-14 日本電気株式会社 ウェハ処理装置およびウェハ処理方法
JP2000315670A (ja) * 1999-04-30 2000-11-14 Nec Corp 半導体基板の洗浄方法
KR100329759B1 (ko) * 1999-06-30 2002-03-25 박종섭 강유전체 캐패시터 형성 방법
JP2001068463A (ja) * 1999-08-31 2001-03-16 Hitachi Ltd 半導体集積回路装置の量産方法
US6261892B1 (en) * 1999-12-31 2001-07-17 Texas Instruments Incorporated Intra-chip AC isolation of RF passive components
JP2002231676A (ja) * 2001-01-30 2002-08-16 Toshiba Corp ウェハ洗浄方法及びウェハ洗浄装置
JP2002353182A (ja) * 2001-05-25 2002-12-06 Mitsubishi Electric Corp 半導体装置の洗浄方法および洗浄装置、ならびに半導体装置の製造方法

Also Published As

Publication number Publication date
US20030036209A1 (en) 2003-02-20
US6709875B2 (en) 2004-03-23
KR100880109B1 (ko) 2009-01-21
DE10231192A1 (de) 2003-03-06
KR20030014627A (ko) 2003-02-19
JP2003158115A (ja) 2003-05-30

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