JP4275395B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP4275395B2 JP4275395B2 JP2002359920A JP2002359920A JP4275395B2 JP 4275395 B2 JP4275395 B2 JP 4275395B2 JP 2002359920 A JP2002359920 A JP 2002359920A JP 2002359920 A JP2002359920 A JP 2002359920A JP 4275395 B2 JP4275395 B2 JP 4275395B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- tungsten
- silicon
- tungsten nitride
- polysilicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
- H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01306—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon
- H10D64/01308—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal
- H10D64/01312—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon the conductor further comprising a non-elemental silicon additional conductive layer, e.g. a metal silicide layer formed by the reaction of silicon with an implanted metal the additional layer comprising a metal or metal silicide formed by deposition, i.e. without a silicidation reaction, e.g. sputter deposition
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
- H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
- H10D64/664—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a barrier layer between the layer of silicon and an upper metal or metal silicide layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
- H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P30/00—Ion implantation into wafers, substrates or parts of devices
- H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
- H10P30/28—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by an annealing step, e.g. for activation of dopants
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
Landscapes
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002359920A JP4275395B2 (ja) | 2002-12-11 | 2002-12-11 | 半導体装置の製造方法 |
| US10/456,529 US6975007B2 (en) | 2002-12-11 | 2003-06-09 | Semiconductor device including a polysilicon, barrier structure, and tungsten layer electrode |
| US11/266,213 US7371681B2 (en) | 2002-12-11 | 2005-11-04 | Method of manufacturing a semiconductor device |
| US11/936,145 US7538030B2 (en) | 2002-12-11 | 2007-11-07 | Semiconductor device and method of manufacturing same |
| US11/936,138 US7479446B2 (en) | 2002-12-11 | 2007-11-07 | Semiconductor device and method of manufacturing same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002359920A JP4275395B2 (ja) | 2002-12-11 | 2002-12-11 | 半導体装置の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2004193365A JP2004193365A (ja) | 2004-07-08 |
| JP2004193365A5 JP2004193365A5 (https=) | 2005-09-08 |
| JP4275395B2 true JP4275395B2 (ja) | 2009-06-10 |
Family
ID=32500966
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002359920A Expired - Fee Related JP4275395B2 (ja) | 2002-12-11 | 2002-12-11 | 半導体装置の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (4) | US6975007B2 (https=) |
| JP (1) | JP4275395B2 (https=) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100937992B1 (ko) | 2003-01-13 | 2010-01-21 | 주식회사 하이닉스반도체 | 게이트전극 및 그를 구비한 반도체 소자의 제조 방법 |
| JP4690120B2 (ja) * | 2005-06-21 | 2011-06-01 | エルピーダメモリ株式会社 | 半導体装置及びその製造方法 |
| KR100759845B1 (ko) * | 2006-09-11 | 2007-09-18 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 이의 제조 방법 |
| KR100881391B1 (ko) * | 2006-09-29 | 2009-02-05 | 주식회사 하이닉스반도체 | 반도체 소자의 게이트 형성방법 |
| US20080149990A1 (en) * | 2006-12-21 | 2008-06-26 | Spansion Llc | Memory system with poly metal gate |
| JP2013197121A (ja) * | 2012-03-15 | 2013-09-30 | Toshiba Corp | 半導体装置及びその製造方法 |
| KR20130116099A (ko) * | 2012-04-13 | 2013-10-23 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
| CN103839806B (zh) * | 2012-11-20 | 2018-02-13 | 中国科学院微电子研究所 | 半导体器件及其制造方法 |
| CN105097474B (zh) * | 2014-05-09 | 2018-03-06 | 中国科学院微电子研究所 | 一种半导体器件的制造方法 |
| US10199267B2 (en) * | 2017-06-30 | 2019-02-05 | Lam Research Corporation | Tungsten nitride barrier layer deposition |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04225568A (ja) | 1990-12-27 | 1992-08-14 | Toshiba Corp | 半導体装置のコンタクト構造及びその製造方法 |
| US5341016A (en) * | 1993-06-16 | 1994-08-23 | Micron Semiconductor, Inc. | Low resistance device element and interconnection structure |
| US5576579A (en) * | 1995-01-12 | 1996-11-19 | International Business Machines Corporation | Tasin oxygen diffusion barrier in multilayer structures |
| JPH10335652A (ja) * | 1997-05-30 | 1998-12-18 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
| JPH11233451A (ja) | 1997-10-07 | 1999-08-27 | Texas Instr Inc <Ti> | 安定した低抵抗のポリ・メタル・ゲート電極を製造するためのcvdに基くプロセス |
| US6291868B1 (en) * | 1998-02-26 | 2001-09-18 | Micron Technology, Inc. | Forming a conductive structure in a semiconductor device |
| US6100188A (en) * | 1998-07-01 | 2000-08-08 | Texas Instruments Incorporated | Stable and low resistance metal/barrier/silicon stack structure and related process for manufacturing |
| KR100296126B1 (ko) | 1998-12-22 | 2001-08-07 | 박종섭 | 고집적 메모리 소자의 게이트전극 형성방법 |
| KR100396692B1 (ko) * | 1999-06-16 | 2003-09-02 | 주식회사 하이닉스반도체 | 반도체 소자의 제조방법 |
| US6313033B1 (en) * | 1999-07-27 | 2001-11-06 | Applied Materials, Inc. | Ionized metal plasma Ta, TaNx, W, and WNx liners for gate electrode applications |
| JP2001308322A (ja) | 2000-04-26 | 2001-11-02 | Hitachi Ltd | 半導体集積回路装置の製造方法 |
| JP2001326348A (ja) | 2000-05-16 | 2001-11-22 | Mitsubishi Electric Corp | 半導体装置の製造方法及び半導体装置 |
| JP2002043566A (ja) * | 2000-07-27 | 2002-02-08 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
| KR20020033851A (ko) * | 2000-10-30 | 2002-05-08 | 박종섭 | 반도체소자의 게이트전극 제조 방법 |
| JP3961211B2 (ja) | 2000-10-31 | 2007-08-22 | 株式会社東芝 | 半導体装置の製造方法 |
| JP2002280550A (ja) * | 2001-03-22 | 2002-09-27 | Mitsubishi Electric Corp | 半導体装置の製造方法及び半導体装置 |
| US6465355B1 (en) * | 2001-04-27 | 2002-10-15 | Hewlett-Packard Company | Method of fabricating suspended microstructures |
| TW546842B (en) * | 2002-05-17 | 2003-08-11 | Winbond Electronics Corp | Multiple-layers gate structure and manufacturing method thereof |
| US6787864B2 (en) * | 2002-09-30 | 2004-09-07 | Advanced Micro Devices, Inc. | Mosfets incorporating nickel germanosilicided gate and methods for their formation |
-
2002
- 2002-12-11 JP JP2002359920A patent/JP4275395B2/ja not_active Expired - Fee Related
-
2003
- 2003-06-09 US US10/456,529 patent/US6975007B2/en not_active Expired - Lifetime
-
2005
- 2005-11-04 US US11/266,213 patent/US7371681B2/en not_active Expired - Fee Related
-
2007
- 2007-11-07 US US11/936,145 patent/US7538030B2/en not_active Expired - Fee Related
- 2007-11-07 US US11/936,138 patent/US7479446B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US7371681B2 (en) | 2008-05-13 |
| US20080064196A1 (en) | 2008-03-13 |
| US6975007B2 (en) | 2005-12-13 |
| JP2004193365A (ja) | 2004-07-08 |
| US20080076239A1 (en) | 2008-03-27 |
| US7479446B2 (en) | 2009-01-20 |
| US7538030B2 (en) | 2009-05-26 |
| US20060054981A1 (en) | 2006-03-16 |
| US20040113213A1 (en) | 2004-06-17 |
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