JP4104342B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP4104342B2 JP4104342B2 JP2002042139A JP2002042139A JP4104342B2 JP 4104342 B2 JP4104342 B2 JP 4104342B2 JP 2002042139 A JP2002042139 A JP 2002042139A JP 2002042139 A JP2002042139 A JP 2002042139A JP 4104342 B2 JP4104342 B2 JP 4104342B2
- Authority
- JP
- Japan
- Prior art keywords
- layer
- ferroelectric
- upper electrode
- electrode layer
- sro
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/692—Electrodes
- H10D1/696—Electrodes comprising multiple layers, e.g. comprising a barrier layer and a metal layer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D1/00—Resistors, capacitors or inductors
- H10D1/60—Capacitors
- H10D1/68—Capacitors having no potential barriers
- H10D1/682—Capacitors having no potential barriers having dielectrics comprising perovskite structures
Landscapes
- Semiconductor Memories (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/797,005 US6674633B2 (en) | 2001-02-28 | 2001-02-28 | Process for producing a strontium ruthenium oxide protective layer on a top electrode |
| US09/797005 | 2001-02-28 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2002314044A JP2002314044A (ja) | 2002-10-25 |
| JP2002314044A5 JP2002314044A5 (enExample) | 2005-06-16 |
| JP4104342B2 true JP4104342B2 (ja) | 2008-06-18 |
Family
ID=25169649
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002042139A Expired - Fee Related JP4104342B2 (ja) | 2001-02-28 | 2002-02-19 | 半導体装置の製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6674633B2 (enExample) |
| JP (1) | JP4104342B2 (enExample) |
| KR (1) | KR100706847B1 (enExample) |
| TW (1) | TWI240987B (enExample) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6674633B2 (en) * | 2001-02-28 | 2004-01-06 | Fujitsu Limited | Process for producing a strontium ruthenium oxide protective layer on a top electrode |
| KR20030041495A (ko) * | 2001-11-20 | 2003-05-27 | 주식회사 하이닉스반도체 | 반도체 소자 및 제조 방법 |
| JP4228569B2 (ja) * | 2001-11-28 | 2009-02-25 | セイコーエプソン株式会社 | 電子デバイス用基板の製造方法及び電子デバイスの製造方法 |
| CN100336226C (zh) * | 2001-12-14 | 2007-09-05 | 株式会社日立制作所 | 半导体器件 |
| US6573587B1 (en) * | 2002-05-28 | 2003-06-03 | Oki Electric Industry Co., Ltd. | Metal oxide capacitor with hydrogen diffusion blocking covering |
| US6785119B2 (en) * | 2002-11-29 | 2004-08-31 | Infineon Technologies Ag | Ferroelectric capacitor and process for its manufacture |
| JP3924286B2 (ja) * | 2003-10-31 | 2007-06-06 | Tdk株式会社 | 積層セラミック電子部品の製造方法 |
| EP1557665A1 (fr) * | 2004-01-21 | 2005-07-27 | CSEM Centre Suisse d'Electronique et de Microtechnique SA | Système d'electrodes pour capteur electrochimique |
| JP4589092B2 (ja) * | 2004-12-03 | 2010-12-01 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| KR100591776B1 (ko) * | 2005-01-03 | 2006-06-26 | 삼성전자주식회사 | 강유전체 메모리 소자 및 그 제조방법 |
| JP4438659B2 (ja) * | 2005-03-24 | 2010-03-24 | Tdk株式会社 | 積層セラミック電子部品の製造方法 |
| KR100725451B1 (ko) * | 2005-06-07 | 2007-06-07 | 삼성전자주식회사 | 강유전체 캐패시터의 제조 방법 및 이를 이용한 반도체장치의 제조 방법 |
| US20070212797A1 (en) * | 2006-03-08 | 2007-09-13 | Suk-Hun Choi | Method of forming a ferroelectric device |
| JP4983172B2 (ja) * | 2006-09-12 | 2012-07-25 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
| US7709359B2 (en) * | 2007-09-05 | 2010-05-04 | Qimonda Ag | Integrated circuit with dielectric layer |
| US8092721B2 (en) * | 2008-03-26 | 2012-01-10 | L'air Liquide Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude | Deposition of ternary oxide films containing ruthenium and alkali earth metals |
| JP5502302B2 (ja) * | 2008-09-26 | 2014-05-28 | ローム株式会社 | 半導体装置およびその製造方法 |
| US7939442B2 (en) * | 2009-04-10 | 2011-05-10 | Micron Technology, Inc. | Strontium ruthenium oxide interface |
| US8859047B2 (en) | 2010-02-23 | 2014-10-14 | L'air Liquide, Societe Anonyme Pour L'etude Et L'exploitation Des Procedes Georges Claude | Use of ruthenium tetroxide as a precursor and reactant for thin film depositions |
| US8395196B2 (en) * | 2010-11-16 | 2013-03-12 | International Business Machines Corporation | Hydrogen barrier liner for ferro-electric random access memory (FRAM) chip |
| CN103972044A (zh) * | 2013-02-01 | 2014-08-06 | 中芯国际集成电路制造(上海)有限公司 | Mim电容器的制备方法以及半导体器件的制备方法 |
| US20170133581A1 (en) * | 2014-06-20 | 2017-05-11 | Ulvac, Inc. | Method of manufacturing multi-layered film and multi-layered film |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0972309A4 (en) * | 1995-06-28 | 2000-01-19 | Telcordia Tech Inc | BARRIER LAYER FOR FERROELECTRIC MEMORY ARRANGEMENT INTEGRATED ON SILICON |
| KR100199095B1 (ko) * | 1995-12-27 | 1999-06-15 | 구본준 | 반도체 메모리 셀의 캐패시터 구조 및 그 제조방법 |
| JP3171110B2 (ja) | 1996-06-19 | 2001-05-28 | ソニー株式会社 | 強誘電体キャパシタ構造の製造方法 |
| US5990507A (en) * | 1996-07-09 | 1999-11-23 | Kabushiki Kaisha Toshiba | Semiconductor device having ferroelectric capacitor structures |
| US6115281A (en) * | 1997-06-09 | 2000-09-05 | Telcordia Technologies, Inc. | Methods and structures to cure the effects of hydrogen annealing on ferroelectric capacitors |
| KR100458084B1 (ko) * | 1997-12-27 | 2005-06-07 | 주식회사 하이닉스반도체 | 누설전류가 감소된 하부전극을 갖는 강유전체 커패시터 형성 방법 |
| KR100335399B1 (ko) * | 1998-10-29 | 2002-07-18 | 박종섭 | 강유전체램 소자의 제조방법 |
| US6172385B1 (en) * | 1998-10-30 | 2001-01-09 | International Business Machines Corporation | Multilayer ferroelectric capacitor structure |
| JP3249496B2 (ja) * | 1998-11-10 | 2002-01-21 | 株式会社東芝 | 半導体装置及び半導体装置の製造方法 |
| US6674633B2 (en) * | 2001-02-28 | 2004-01-06 | Fujitsu Limited | Process for producing a strontium ruthenium oxide protective layer on a top electrode |
-
2001
- 2001-02-28 US US09/797,005 patent/US6674633B2/en not_active Expired - Lifetime
- 2001-08-13 KR KR1020010048646A patent/KR100706847B1/ko not_active Expired - Fee Related
- 2001-10-11 TW TW090125108A patent/TWI240987B/zh not_active IP Right Cessation
-
2002
- 2002-02-19 JP JP2002042139A patent/JP4104342B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR20020070624A (ko) | 2002-09-10 |
| JP2002314044A (ja) | 2002-10-25 |
| US6674633B2 (en) | 2004-01-06 |
| TWI240987B (en) | 2005-10-01 |
| US20020149040A1 (en) | 2002-10-17 |
| KR100706847B1 (ko) | 2007-04-13 |
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