JP4092209B2 - 薄膜チップ抵抗体の製造方法 - Google Patents
薄膜チップ抵抗体の製造方法 Download PDFInfo
- Publication number
- JP4092209B2 JP4092209B2 JP2002570248A JP2002570248A JP4092209B2 JP 4092209 B2 JP4092209 B2 JP 4092209B2 JP 2002570248 A JP2002570248 A JP 2002570248A JP 2002570248 A JP2002570248 A JP 2002570248A JP 4092209 B2 JP4092209 B2 JP 4092209B2
- Authority
- JP
- Japan
- Prior art keywords
- resistor
- laser
- thin film
- substrate
- lands
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/003—Apparatus or processes specially adapted for manufacturing resistors using lithography, e.g. photolithography
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/006—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/22—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming
- H01C17/24—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material
- H01C17/242—Apparatus or processes specially adapted for manufacturing resistors adapted for trimming by removing or adding resistive material by laser
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S430/00—Radiation imagery chemistry: process, composition, or product thereof
- Y10S430/146—Laser beam
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/94—Laser ablative material removal
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Plasma & Fusion (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
ここでは、プリント基板として使用されるべきプラスチック材料の上に金属フィルムを直接構築することが、提案されている。
更なる実施例は、従属の請求項において提供されている。
11,12 構築手段(ノッチ)
13 抵抗体素子
14 薄膜抵抗体層(例えば、金属合金)
15,16 接点層(上側表面)
17,18 接点層(下側表面)
19 マスク
20 レーザービーム(マスクされない)
21 マスク開口
22 レーザービーム(マスクされた)
23 レーザービーム
24 抵抗体ランド
25 光学結像系
100 薄膜チップ抵抗体
Claims (11)
- 抵抗体層(14)と接点層(15,16)が、基板(10)の上面に設けられて、レーザー光により前記基板(10)上に所定の近似の抵抗値を有する複数の隣接した独立の抵抗体ランド(24)を形成するように構成された、薄膜チップ抵抗体(100)の製造方法において、抵抗体素子(13)の電気的絶縁と前記個々の抵抗体ランド(24)の構築が、レーザーリトグラフ直接露光法を使用して、全抵抗体ランドに対して同時に行われることを特徴とする薄膜チップ抵抗体の製造方法。
- 幾つかの特に隣接した抵抗体素子(13)が、同時に電気的に絶縁されて、1回または数回の露光により構築され、且つ、前記抵抗体ランド(24)の構築に加えて、前記レーザーリトグラフ直接露光中に、隣接する薄膜チップ抵抗体が同時に互いに電気絶縁されることを特徴とする、請求項1に記載の方法。
- 前記レーザーリトグラフ直接露光のために、形成されるべき前記抵抗体ランド(24)の構成に対応するマスク(19)が挿入されて、前記基板の表面に光学的結合系(25)により描写される光路内へUVレーザーが使用されることを特徴とする請求項2に記載の方法。
- エキシマレーザーは、150nmから400nmの範囲の波長を有するレーザー光を発することを特徴とする、請求項3に記載の方法。
- 構築手段(11,12)により個々の領域(13)に予め分割された基板(10)が使用され、前記領域(13)にそれぞれ一つの薄膜チップ抵抗体(100)が形成されることを特徴とする、請求項4に記載の方法。
- 前記構築手段(切込、レーザー画線、レーザー溝、鋸歯状部)は、互いに直交して延び且つ前記基板(10)の表面に格子を形成する複数のV字形のノッチ(11,12)を含み、且つ、前記薄膜チップ抵抗体(100)の製造完了後、前記基板(10)が前記ノッチ(11,12)に沿って個々の薄膜チップ抵抗体(100)または密着した抵抗体アレー或いは抵抗体網に分断されることを特徴とする、請求項5に記載の方法。
- 前記抵抗体層(14)を構築する前に個々の抵抗体ランド(24)を形成するため、形成されるべき前記各薄膜チップ抵抗体(100)のための区々接点層(15,16)は、形成されるべき前記抵抗体ランド(24)の各端部の前記抵抗体層(14)上に設けられていることを特徴とする、請求項6に記載の方法。
- 前記抵抗体層(14)上の前記接点層(15,16)に加えて、前記基板(10)の下面上に別々の区々の接点層または接点片(17,18)が設けられていることを特徴とする、請求項7に記載の方法。
- 前記接点層(15,16)は好ましくは薄膜法(スパッタリングまたは真空蒸着)により形成され、他方、前記接点片(17,18)は好ましくは厚膜法により形成されていることを特徴とする、請求項8に記載の方法。
- レーザーリトグラフ直接露光法を使用する前記抵抗体ランド(24)の構築に続いて、前記抵抗体ランド(24)の微細調整が行われることを特徴とする、請求項9に記載の方法。
- 前記微細調整はレーザー光(23)を使用して行われることを特徴とする、請求項10に記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10110179A DE10110179B4 (de) | 2001-03-02 | 2001-03-02 | Verfahren zum Herstellen von Dünnschicht-Chipwiderständen |
PCT/EP2002/001730 WO2002071419A1 (de) | 2001-03-02 | 2002-02-19 | Verfahren zum herstellen von dünnschicht-chipwiderständen |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2004530290A JP2004530290A (ja) | 2004-09-30 |
JP4092209B2 true JP4092209B2 (ja) | 2008-05-28 |
Family
ID=7676132
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2002570248A Expired - Lifetime JP4092209B2 (ja) | 2001-03-02 | 2002-02-19 | 薄膜チップ抵抗体の製造方法 |
Country Status (9)
Country | Link |
---|---|
US (1) | US6998220B2 (ja) |
EP (1) | EP1374257B1 (ja) |
JP (1) | JP4092209B2 (ja) |
KR (1) | KR100668185B1 (ja) |
CN (1) | CN100413000C (ja) |
AT (1) | ATE276575T1 (ja) |
DE (2) | DE10110179B4 (ja) |
TW (1) | TW594802B (ja) |
WO (1) | WO2002071419A1 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10110179B4 (de) | 2001-03-02 | 2004-10-14 | BCcomponents Holding B.V. | Verfahren zum Herstellen von Dünnschicht-Chipwiderständen |
US7378337B2 (en) * | 2003-11-04 | 2008-05-27 | Electro Scientific Industries, Inc. | Laser-based termination of miniature passive electronic components |
TW200534296A (en) * | 2004-02-09 | 2005-10-16 | Rohm Co Ltd | Method of making thin-film chip resistor |
JP2011187985A (ja) * | 2004-03-31 | 2011-09-22 | Mitsubishi Materials Corp | チップ抵抗器の製造方法 |
US7882621B2 (en) * | 2008-02-29 | 2011-02-08 | Yageo Corporation | Method for making chip resistor components |
CN102176356A (zh) * | 2011-03-01 | 2011-09-07 | 西安天衡计量仪表有限公司 | 一种铂电阻芯片及铂电阻芯片的制备方法 |
DE102018115205A1 (de) * | 2018-06-25 | 2020-01-02 | Vishay Electronic Gmbh | Verfahren zur Herstellung einer Vielzahl von Widerstandsbaueinheiten |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1765145C3 (de) * | 1968-04-09 | 1973-11-29 | Siemens Ag, 1000 Berlin U. 8000 Muenchen | Verfahren zum Bearbeiten dunner Schichten von elektrischen Schalt kreisen mit Laserstrahlen |
US3699649A (en) * | 1969-11-05 | 1972-10-24 | Donald A Mcwilliams | Method of and apparatus for regulating the resistance of film resistors |
US4468414A (en) | 1983-07-29 | 1984-08-28 | Harris Corporation | Dielectric isolation fabrication for laser trimming |
US4594265A (en) * | 1984-05-15 | 1986-06-10 | Harris Corporation | Laser trimming of resistors over dielectrically isolated islands |
DE3843230C1 (en) * | 1988-12-22 | 1989-09-21 | W.C. Heraeus Gmbh, 6450 Hanau, De | Process for making a metallic pattern on a base, in particular for the laser structuring of conductor tracks |
JPH04178503A (ja) | 1990-11-14 | 1992-06-25 | Nec Corp | 歪センサーの製造方法 |
US5384230A (en) | 1992-03-02 | 1995-01-24 | Berg; N. Edward | Process for fabricating printed circuit boards |
DE4429794C1 (de) * | 1994-08-23 | 1996-02-29 | Fraunhofer Ges Forschung | Verfahren zum Herstellen von Chip-Widerständen |
US5683928A (en) * | 1994-12-05 | 1997-11-04 | General Electric Company | Method for fabricating a thin film resistor |
US5852226A (en) * | 1997-01-14 | 1998-12-22 | Pioneer Hi-Bred International, Inc. | Soybean variety 93B82 |
US5976392A (en) * | 1997-03-07 | 1999-11-02 | Yageo Corporation | Method for fabrication of thin film resistor |
DE19901540A1 (de) * | 1999-01-16 | 2000-07-20 | Philips Corp Intellectual Pty | Verfahren zur Feinabstimmung eines passiven, elektronischen Bauelementes |
US6365483B1 (en) | 2000-04-11 | 2002-04-02 | Viking Technology Corporation | Method for forming a thin film resistor |
US6605760B1 (en) * | 2000-12-22 | 2003-08-12 | Pioneer Hi-Bred International, Inc. | Soybean variety 94B73 |
US6613965B1 (en) * | 2000-12-22 | 2003-09-02 | Pioneer Hi-Bred International, Inc. | Soybean variety 94B54 |
DE10110179B4 (de) | 2001-03-02 | 2004-10-14 | BCcomponents Holding B.V. | Verfahren zum Herstellen von Dünnschicht-Chipwiderständen |
-
2001
- 2001-03-02 DE DE10110179A patent/DE10110179B4/de not_active Expired - Fee Related
-
2002
- 2002-02-19 AT AT02700251T patent/ATE276575T1/de not_active IP Right Cessation
- 2002-02-19 US US10/469,214 patent/US6998220B2/en not_active Expired - Lifetime
- 2002-02-19 JP JP2002570248A patent/JP4092209B2/ja not_active Expired - Lifetime
- 2002-02-19 CN CNB028059069A patent/CN100413000C/zh not_active Expired - Lifetime
- 2002-02-19 KR KR1020037011426A patent/KR100668185B1/ko not_active IP Right Cessation
- 2002-02-19 WO PCT/EP2002/001730 patent/WO2002071419A1/de active IP Right Grant
- 2002-02-19 EP EP02700251A patent/EP1374257B1/de not_active Expired - Lifetime
- 2002-02-19 DE DE50201035T patent/DE50201035D1/de not_active Expired - Lifetime
- 2002-02-26 TW TW091103422A patent/TW594802B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
DE50201035D1 (de) | 2004-10-21 |
CN100413000C (zh) | 2008-08-20 |
DE10110179B4 (de) | 2004-10-14 |
KR20030086282A (ko) | 2003-11-07 |
ATE276575T1 (de) | 2004-10-15 |
DE10110179A1 (de) | 2002-12-05 |
EP1374257B1 (de) | 2004-09-15 |
CN1552080A (zh) | 2004-12-01 |
US6998220B2 (en) | 2006-02-14 |
KR100668185B1 (ko) | 2007-01-11 |
JP2004530290A (ja) | 2004-09-30 |
EP1374257A1 (de) | 2004-01-02 |
US20040126704A1 (en) | 2004-07-01 |
TW594802B (en) | 2004-06-21 |
WO2002071419A1 (de) | 2002-09-12 |
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