JP4082459B2 - 表示装置の製造方法 - Google Patents
表示装置の製造方法 Download PDFInfo
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- JP4082459B2 JP4082459B2 JP2005113935A JP2005113935A JP4082459B2 JP 4082459 B2 JP4082459 B2 JP 4082459B2 JP 2005113935 A JP2005113935 A JP 2005113935A JP 2005113935 A JP2005113935 A JP 2005113935A JP 4082459 B2 JP4082459 B2 JP 4082459B2
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- 238000004519 manufacturing process Methods 0.000 title claims description 29
- 239000004065 semiconductor Substances 0.000 claims description 110
- 238000000034 method Methods 0.000 claims description 31
- 239000000758 substrate Substances 0.000 claims description 20
- 239000011261 inert gas Substances 0.000 claims description 11
- 230000007547 defect Effects 0.000 claims description 8
- 229920002120 photoresistant polymer Polymers 0.000 claims description 6
- 239000010410 layer Substances 0.000 description 93
- 239000010408 film Substances 0.000 description 58
- 239000010409 thin film Substances 0.000 description 33
- 229910021417 amorphous silicon Inorganic materials 0.000 description 8
- 238000004381 surface treatment Methods 0.000 description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 239000011229 interlayer Substances 0.000 description 4
- 238000002161 passivation Methods 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000000052 comparative effect Effects 0.000 description 2
- 238000002425 crystallisation Methods 0.000 description 2
- 230000008025 crystallization Effects 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000001505 atmospheric-pressure chemical vapour deposition Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910021472 group 8 element Inorganic materials 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 230000003746 surface roughness Effects 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32138—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only pre- or post-treatments, e.g. anti-corrosion processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
Description
画素領域と回路領域を備える基板上に非晶質シリコン膜を積層し,その非晶質シリコン膜をELA法を使用して結晶化することにより多結晶シリコン膜を形成した。この多結晶シリコン膜をパターニングすることにより,画素領域及び回路領域上に第1の半導体層及び第2の半導体層を各々形成した。第2の半導体層上にフォトレジストパターンを形成して第1の半導体層を露出させた。露出された第1の半導体層を5000sccmのHe,100sccmのO2,RFパワー300W,圧力660Paの条件で120秒間表面処理した。
第1の半導体層の表面を5000sccmのHe,500sccmのO2,RFパワー700Wの,圧力600Paの条件で,120秒間処理したこと以外は,上記製造例1と同一の方法により画素及び回路薄膜トランジスタを製造した。
第1の半導体層及び第2の半導体層を形成した後,第1の半導体層を表面処理しないで第1の半導体層及び第2の半導体層上にゲート絶縁膜を形成したこと以外は,製造例1と同一な方法により画素及び回路薄膜トランジスタを製造した。
13 バッファ層
21 第1の半導体層
25 第1のゲート電極
27a 第1のソース電極
27b 第1のドレーン電極
31 第2の半導体層
33 ゲート絶縁膜
35 第2のゲート電極
37a 第2のソース電極
37b 第2のドレーン電極
45 パシベーション膜
50 画素電極
55 画素定義膜
60 有機機能膜
70 対向電極
99 マスクパターン
Claims (11)
- 画素領域及び前記画素領域の周辺部に位置する回路領域を備える基板を提供する段階と,
前記画素領域及び前記回路領域上に第1の半導体層及び第2の半導体層を各々形成する段階と,
O2,N2O,H2及び不活性気体よりなる群から選択される少なくとも一つを含有するプラズマを用いて,前記第1の半導体層を選択的に表面処理して,前記第1の半導体層表面の格子欠陥密度を増加させる段階と,
前記第2の半導体層及び前記表面処理された第1の半導体層上にゲート絶縁膜を形成する段階と,
前記ゲート絶縁膜上に前記第1の半導体層及び前記第2の半導体層と各々重畳される第1のゲート電極及び第2のゲート電極を形成する段階と,
を含む,ことを特徴とする表示装置の製造方法。 - 前記第1の半導体層を選択的に表面処理する段階は,
前記第2の半導体層上にマスクパターンを形成して前記第1の半導体層を露出させる段階と,
前記露出された第1の半導体層をプラズマを使用して表面処理する段階と,
を含む,ことを特徴とする請求項1に記載の表示装置の製造方法。 - 前記マスクパターンは,フォトレジストパターンである,ことを特徴とする請求項2に記載の表示装置の製造方法。
- 前記第1の半導体層と接続する第1のドレーン電極を形成する段階と,
前記第1のドレーン電極と電気的に接続する画素電極を形成する段階と,
をさらに含む,ことを特徴とする請求項1に記載の表示装置の製造方法。 - 前記画素電極上に少なくとも発光層を備える有機機能膜を形成する段階と,
前記有機機能膜上に対向電極を形成する段階と,
をさらに含む,ことを特徴とする請求項4に記載の表示装置の製造方法。 - 画素領域及び前記画素領域の周辺部に位置する回路領域を備える基板を提供する段階と,
前記画素領域及び前記回路領域上に第1の半導体層及び第2の半導体層を各々形成する段階と,
前記第1の半導体層を不活性気体プラズマを使用して選択的に表面処理する段階と,
前記第2の半導体層及び前記表面処理された第1の半導体層上にゲート絶縁膜を形成する段階と,
前記ゲート絶縁膜上に前記第1の半導体層及び前記第2の半導体層と各々重畳される第1のゲート電極及び第2のゲート電極を形成する段階と,
を含む,ことを特徴とする表示装置の製造方法。 - 前記第1の半導体層を選択的に表面処理する段階は,
前記第2の半導体層上にマスクパターンを形成して前記第1の半導体層を露出させる段階と,
前記露出された第1の半導体層を不活性気体プラズマを使用して表面処理する段階と,
を含む,ことを特徴とする請求項6に記載の表示装置の製造方法。 - 前記マスクパターンは,フォトレジストパターンである,ことを特徴とする請求項7に記載の表示装置の製造方法。
- 前記不活性気体は,N2,He及びArよりなる群から選択される少なくとも一つからなる,ことを特徴とする請求項6に記載の表示装置の製造方法。
- 前記第1の半導体層と接続する第1のドレーン電極を形成する段階と,
前記第1のドレーン電極と電気的に接続する画素電極を形成する段階と,
をさらに含む,ことを特徴とする請求項6に記載の表示装置の製造方法。 - 前記画素電極上に少なくとも発光層を備える有機機能膜を形成する段階と,
前記有機機能膜上に対向電極を形成する段階と,
をさらに含む,ことを特徴とする請求項10に記載の表示装置の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020040050873A KR100623691B1 (ko) | 2004-06-30 | 2004-06-30 | 표시장치의 제조방법 |
Publications (2)
Publication Number | Publication Date |
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JP2006019701A JP2006019701A (ja) | 2006-01-19 |
JP4082459B2 true JP4082459B2 (ja) | 2008-04-30 |
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JP2005113935A Active JP4082459B2 (ja) | 2004-06-30 | 2005-04-11 | 表示装置の製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8796122B2 (ja) |
JP (1) | JP4082459B2 (ja) |
KR (1) | KR100623691B1 (ja) |
CN (1) | CN1716532B (ja) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI270213B (en) * | 2005-09-30 | 2007-01-01 | Au Optronics Corp | Low temperature poly-silicon thin film transistor display and method of fabricated the same |
KR101263652B1 (ko) * | 2006-07-25 | 2013-05-21 | 삼성디스플레이 주식회사 | 평판 표시 장치 및 이의 제조 방법 |
KR101402261B1 (ko) * | 2007-09-18 | 2014-06-03 | 삼성디스플레이 주식회사 | 박막 트랜지스터의 제조 방법 |
JP5015705B2 (ja) * | 2007-09-18 | 2012-08-29 | ルネサスエレクトロニクス株式会社 | 層間絶縁膜形成方法、層間絶縁膜、半導体デバイス、および半導体製造装置 |
CN102479752B (zh) * | 2010-11-30 | 2014-08-13 | 京东方科技集团股份有限公司 | 薄膜晶体管、有源矩阵背板及其制造方法和显示器 |
CN103715226A (zh) * | 2013-12-12 | 2014-04-09 | 京东方科技集团股份有限公司 | Oled阵列基板及其制备方法、显示面板及显示装置 |
KR102304726B1 (ko) * | 2015-03-27 | 2021-09-27 | 삼성디스플레이 주식회사 | 디스플레이 장치의 제조 방법 및 이를 통해 제조된 디스플레이 장치 |
US10319880B2 (en) * | 2016-12-02 | 2019-06-11 | Innolux Corporation | Display device |
KR102519086B1 (ko) | 2017-10-25 | 2023-04-06 | 삼성디스플레이 주식회사 | 유기 발광 표시 장치 및 이의 제조 방법 |
KR20210081710A (ko) * | 2019-12-24 | 2021-07-02 | 엘지디스플레이 주식회사 | 서로 다른 타입의 박막 트랜지스터들을 포함하는 표시장치 및 그 제조방법 |
KR20210102557A (ko) | 2020-02-11 | 2021-08-20 | 삼성디스플레이 주식회사 | 디스플레이 장치 |
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JP3109968B2 (ja) * | 1994-12-12 | 2000-11-20 | キヤノン株式会社 | アクティブマトリクス回路基板の製造方法及び該回路基板を用いた液晶表示装置の製造方法 |
US6462722B1 (en) | 1997-02-17 | 2002-10-08 | Seiko Epson Corporation | Current-driven light-emitting display apparatus and method of producing the same |
JP2000208771A (ja) * | 1999-01-11 | 2000-07-28 | Hitachi Ltd | 半導体装置、液晶表示装置およびこれらの製造方法 |
US6576924B1 (en) * | 1999-02-12 | 2003-06-10 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device having at least a pixel unit and a driver circuit unit over a same substrate |
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JP2001085392A (ja) * | 1999-09-10 | 2001-03-30 | Toshiba Corp | 半導体装置の製造方法 |
US6169041B1 (en) * | 1999-11-01 | 2001-01-02 | United Microelectronics Corp. | Method for enhancing the reliability of a dielectric layer of a semiconductor wafer |
KR100344777B1 (ko) * | 2000-02-28 | 2002-07-20 | 엘지.필립스 엘시디 주식회사 | 박막트랜지스터를 포함하는 소자 제조방법 |
JP2002231955A (ja) | 2001-02-01 | 2002-08-16 | Hitachi Ltd | 表示装置およびその製造方法 |
US6793980B2 (en) * | 2001-06-28 | 2004-09-21 | Fuji Xerox Co., Ltd. | Method of forming photo-catalytic film made of titanium oxide on base material and laminated material thereof |
JP4544809B2 (ja) * | 2001-07-18 | 2010-09-15 | 三星電子株式会社 | 液晶表示装置 |
KR100853220B1 (ko) | 2002-04-04 | 2008-08-20 | 삼성전자주식회사 | 표시 장치용 박막 트랜지스터 어레이 기판의 제조 방법 |
JP4454921B2 (ja) * | 2002-09-27 | 2010-04-21 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
KR20040054433A (ko) * | 2002-12-18 | 2004-06-25 | 엘지.필립스 엘시디 주식회사 | 구동회로 일체형 액정표시장의 스위칭 소자 또는구동소자의 제조방법 |
KR100699995B1 (ko) * | 2004-09-02 | 2007-03-26 | 삼성에스디아이 주식회사 | 유기 전계 발광 소자 및 그 제조 방법 |
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2004
- 2004-06-30 KR KR1020040050873A patent/KR100623691B1/ko active IP Right Grant
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2005
- 2005-04-11 JP JP2005113935A patent/JP4082459B2/ja active Active
- 2005-06-29 CN CN2005100821150A patent/CN1716532B/zh active Active
- 2005-06-30 US US11/170,486 patent/US8796122B2/en active Active
Also Published As
Publication number | Publication date |
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US8796122B2 (en) | 2014-08-05 |
CN1716532A (zh) | 2006-01-04 |
KR20060001716A (ko) | 2006-01-06 |
CN1716532B (zh) | 2010-05-26 |
JP2006019701A (ja) | 2006-01-19 |
KR100623691B1 (ko) | 2006-09-19 |
US20060003505A1 (en) | 2006-01-05 |
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