JP4056173B2 - 半導体記憶装置および該半導体記憶装置のリフレッシュ方法 - Google Patents

半導体記憶装置および該半導体記憶装置のリフレッシュ方法 Download PDF

Info

Publication number
JP4056173B2
JP4056173B2 JP10681399A JP10681399A JP4056173B2 JP 4056173 B2 JP4056173 B2 JP 4056173B2 JP 10681399 A JP10681399 A JP 10681399A JP 10681399 A JP10681399 A JP 10681399A JP 4056173 B2 JP4056173 B2 JP 4056173B2
Authority
JP
Japan
Prior art keywords
refresh
address
refresh address
memory device
semiconductor memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP10681399A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000298982A (ja
JP2000298982A5 (enExample
Inventor
義博 竹前
康郎 松崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP10681399A priority Critical patent/JP4056173B2/ja
Priority to US09/517,279 priority patent/US6215714B1/en
Publication of JP2000298982A publication Critical patent/JP2000298982A/ja
Priority to US09/828,847 priority patent/US6349068B2/en
Publication of JP2000298982A5 publication Critical patent/JP2000298982A5/ja
Application granted granted Critical
Publication of JP4056173B2 publication Critical patent/JP4056173B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40622—Partial refresh of memory arrays
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
JP10681399A 1999-04-14 1999-04-14 半導体記憶装置および該半導体記憶装置のリフレッシュ方法 Expired - Lifetime JP4056173B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP10681399A JP4056173B2 (ja) 1999-04-14 1999-04-14 半導体記憶装置および該半導体記憶装置のリフレッシュ方法
US09/517,279 US6215714B1 (en) 1999-04-14 2000-03-02 Semiconductor memory device capable of reducing power consumption in self-refresh operation
US09/828,847 US6349068B2 (en) 1999-04-14 2001-04-10 Semiconductor memory device capable of reducing power consumption in self-refresh operation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10681399A JP4056173B2 (ja) 1999-04-14 1999-04-14 半導体記憶装置および該半導体記憶装置のリフレッシュ方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007196381A Division JP2007280608A (ja) 2007-07-27 2007-07-27 半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2000298982A JP2000298982A (ja) 2000-10-24
JP2000298982A5 JP2000298982A5 (enExample) 2004-10-07
JP4056173B2 true JP4056173B2 (ja) 2008-03-05

Family

ID=14443286

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10681399A Expired - Lifetime JP4056173B2 (ja) 1999-04-14 1999-04-14 半導体記憶装置および該半導体記憶装置のリフレッシュ方法

Country Status (2)

Country Link
US (2) US6215714B1 (enExample)
JP (1) JP4056173B2 (enExample)

Families Citing this family (85)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3797810B2 (ja) 1998-11-30 2006-07-19 松下電器産業株式会社 半導体装置
JP4339995B2 (ja) * 1999-11-16 2009-10-07 パナソニック株式会社 半導体記憶装置
TW522399B (en) 1999-12-08 2003-03-01 Hitachi Ltd Semiconductor device
JP3778417B2 (ja) * 2000-02-29 2006-05-24 富士通株式会社 半導体記憶装置
US6731563B1 (en) * 2000-06-08 2004-05-04 Mitsubishi Denki Kabushiki Kaisha Data backup device and step-up/step-down power supply
JP3531598B2 (ja) 2000-10-20 2004-05-31 セイコーエプソン株式会社 半導体装置、メモリシステムおよび電子機器
JP4216457B2 (ja) 2000-11-30 2009-01-28 富士通マイクロエレクトロニクス株式会社 半導体記憶装置及び半導体装置
US7085186B2 (en) * 2001-04-05 2006-08-01 Purple Mountain Server Llc Method for hiding a refresh in a pseudo-static memory
US6590822B2 (en) * 2001-05-07 2003-07-08 Samsung Electronics Co., Ltd. System and method for performing partial array self-refresh operation in a semiconductor memory device
JP2002373489A (ja) * 2001-06-15 2002-12-26 Mitsubishi Electric Corp 半導体記憶装置
US6742097B2 (en) 2001-07-30 2004-05-25 Rambus Inc. Consolidation of allocated memory to reduce power consumption
DE10143766A1 (de) * 2001-09-06 2003-04-03 Infineon Technologies Ag Speichersystem
US6738861B2 (en) * 2001-09-20 2004-05-18 Intel Corporation System and method for managing data in memory for reducing power consumption
US6646942B2 (en) 2001-10-09 2003-11-11 Micron Technology, Inc. Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages
US6771553B2 (en) * 2001-10-18 2004-08-03 Micron Technology, Inc. Low power auto-refresh circuit and method for dynamic random access memories
JP3948933B2 (ja) * 2001-11-07 2007-07-25 富士通株式会社 半導体記憶装置、及びその制御方法
US6650587B2 (en) * 2001-11-19 2003-11-18 Micron Technology, Inc. Partial array self-refresh
JP4459495B2 (ja) * 2001-12-13 2010-04-28 富士通マイクロエレクトロニクス株式会社 半導体記憶装置のリフレッシュ制御方法、及び該制御方法を有する半導体記憶装置
US6618314B1 (en) 2002-03-04 2003-09-09 Cypress Semiconductor Corp. Method and architecture for reducing the power consumption for memory devices in refresh operations
US6731548B2 (en) * 2002-06-07 2004-05-04 Micron Technology, Inc. Reduced power registered memory module and method
JP2004030738A (ja) * 2002-06-24 2004-01-29 Toshiba Corp ダイナミック型半導体メモリ装置
KR100506057B1 (ko) * 2002-07-15 2005-08-03 주식회사 하이닉스반도체 부분 어레이 셀프 리프레시를 수행하는 반도체 메모리 장치
KR100481918B1 (ko) * 2002-07-15 2005-04-13 주식회사 하이닉스반도체 반도체 메모리 장치
JP4246971B2 (ja) * 2002-07-15 2009-04-02 富士通マイクロエレクトロニクス株式会社 半導体メモリ
KR100455393B1 (ko) * 2002-08-12 2004-11-06 삼성전자주식회사 리프레시 플래그를 발생시키는 반도체 메모리 장치 및반도체 메모리 시스템.
US7002867B2 (en) * 2002-09-25 2006-02-21 Infineon Technologies Aktiengesellschaft Refresh control circuit for ICs with a memory array
KR100535071B1 (ko) * 2002-11-07 2005-12-07 주식회사 하이닉스반도체 셀프 리프레쉬 장치
US6934199B2 (en) * 2002-12-11 2005-08-23 Micron Technology, Inc. Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency
US6971034B2 (en) * 2003-01-09 2005-11-29 Intel Corporation Power/performance optimized memory controller considering processor power states
US7010656B2 (en) * 2003-01-28 2006-03-07 Intel Corporation Method and apparatus for memory management
WO2004070729A1 (ja) * 2003-02-05 2004-08-19 Fujitsu Limited 半導体メモリ
WO2004095467A1 (ja) 2003-04-24 2004-11-04 Fujitsu Limited 半導体メモリ
US6862238B1 (en) * 2003-09-25 2005-03-01 Infineon Technologies Ag Memory system with reduced refresh current
US20050078538A1 (en) * 2003-09-30 2005-04-14 Rainer Hoehler Selective address-range refresh
US7345940B2 (en) * 2003-11-18 2008-03-18 Infineon Technologies Ag Method and circuit configuration for refreshing data in a semiconductor memory
US7100662B2 (en) * 2004-02-09 2006-09-05 Annwil Inc. Golf cart club bag protection device
JP4532481B2 (ja) 2004-03-11 2010-08-25 富士通セミコンダクター株式会社 半導体メモリ
US7099221B2 (en) * 2004-05-06 2006-08-29 Micron Technology, Inc. Memory controller method and system compensating for memory cell data losses
US7236416B2 (en) * 2004-05-21 2007-06-26 Qualcomm Incorporated Method and system for controlling refresh in volatile memories
KR100594439B1 (ko) 2004-06-18 2006-06-30 엘지전자 주식회사 메모리 제어를 이용한 휴대장치의 사용시간 연장 방법
US20060010339A1 (en) * 2004-06-24 2006-01-12 Klein Dean A Memory system and method having selective ECC during low power refresh
US7340668B2 (en) * 2004-06-25 2008-03-04 Micron Technology, Inc. Low power cost-effective ECC memory system and method
US7116602B2 (en) 2004-07-15 2006-10-03 Micron Technology, Inc. Method and system for controlling refresh to avoid memory cell data losses
US7827424B2 (en) * 2004-07-29 2010-11-02 Ati Technologies Ulc Dynamic clock control circuit and method
JP4260081B2 (ja) * 2004-08-24 2009-04-30 アルパイン株式会社 ディスク装置、ディスク装置におけるディスクのチェック方法、排出方法並びにローディング方法
US6965537B1 (en) * 2004-08-31 2005-11-15 Micron Technology, Inc. Memory system and method using ECC to achieve low power refresh
KR100590219B1 (ko) * 2004-12-01 2006-06-19 삼성전자주식회사 프로그램 시간을 줄일 수 있는 불 휘발성 메모리 장치
KR100618704B1 (ko) * 2004-12-20 2006-09-08 주식회사 하이닉스반도체 메모리 장치의 ｍｒｓ 설정동작 제어 방법
US7342841B2 (en) * 2004-12-21 2008-03-11 Intel Corporation Method, apparatus, and system for active refresh management
US8593470B2 (en) * 2005-02-24 2013-11-26 Ati Technologies Ulc Dynamic memory clock switching circuit and method for adjusting power consumption
JP2006286149A (ja) * 2005-04-05 2006-10-19 Matsushita Electric Ind Co Ltd 半導体記憶装置
US7800621B2 (en) * 2005-05-16 2010-09-21 Ati Technologies Inc. Apparatus and methods for control of a memory controller
KR100646271B1 (ko) * 2005-12-08 2006-11-23 주식회사 하이닉스반도체 반도체 메모리 장치
JP2007272573A (ja) * 2006-03-31 2007-10-18 Hitachi Ltd 低消費電力化メモリ管理方法及びメモリ管理プログラム
KR100810060B1 (ko) 2006-04-14 2008-03-05 주식회사 하이닉스반도체 반도체 메모리 소자 및 그의 구동방법
KR100810612B1 (ko) * 2006-06-16 2008-03-06 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 리플레시 동작 시 추가기능 수행 방법
KR100780624B1 (ko) * 2006-06-29 2007-11-29 주식회사 하이닉스반도체 반도체 메모리 장치 및 그 구동방법
JP4209906B2 (ja) * 2006-08-02 2009-01-14 株式会社日立製作所 低消費電力メモリ管理方法及びその方法を用いた計算機
JP4299849B2 (ja) 2006-08-22 2009-07-22 エルピーダメモリ株式会社 半導体記憶装置及びそのリフレッシュ制御方法
JP2008090395A (ja) * 2006-09-29 2008-04-17 Hitachi Ltd 計算機システム、演算用ノード及びプログラム
US7894289B2 (en) 2006-10-11 2011-02-22 Micron Technology, Inc. Memory system and method using partial ECC to achieve low power refresh and fast access to data
US7900120B2 (en) 2006-10-18 2011-03-01 Micron Technology, Inc. Memory system and method using ECC with flag bit to identify modified data
JP4353331B2 (ja) 2006-12-05 2009-10-28 エルピーダメモリ株式会社 半導体記憶装置
US7613064B1 (en) * 2006-12-19 2009-11-03 Nvidia Corporation Power management modes for memory devices
JP2009043337A (ja) * 2007-08-08 2009-02-26 Hitachi Ltd 情報記録再生装置及びメモリ制御方法
KR100909630B1 (ko) * 2007-11-02 2009-07-27 주식회사 하이닉스반도체 어드레스 카운터 회로
US7961541B2 (en) * 2007-12-12 2011-06-14 Zmos Technology, Inc. Memory device with self-refresh operations
US7983108B2 (en) * 2008-08-04 2011-07-19 Micron Technology, Inc. Row mask addressing
JP5599977B2 (ja) * 2009-01-22 2014-10-01 ピーエスフォー ルクスコ エスエイアールエル 半導体記憶装置
US7900090B2 (en) * 2009-02-13 2011-03-01 Oracle America, Inc. Systems and methods for memory retention across resets
JP5448697B2 (ja) * 2009-10-09 2014-03-19 ピーエスフォー ルクスコ エスエイアールエル 半導体記憶装置及びデータ処理システム
KR20110100466A (ko) * 2010-03-04 2011-09-14 삼성전자주식회사 휘발성 메모리 장치를 구비하는 시스템의 파워다운 방법
US8799685B2 (en) 2010-08-25 2014-08-05 Advanced Micro Devices, Inc. Circuits and methods for providing adjustable power consumption
KR101796116B1 (ko) 2010-10-20 2017-11-10 삼성전자 주식회사 반도체 장치, 이를 포함하는 메모리 모듈, 메모리 시스템 및 그 동작방법
US8799566B2 (en) * 2010-12-09 2014-08-05 International Business Machines Corporation Memory system with a programmable refresh cycle
WO2013147746A1 (en) 2012-03-27 2013-10-03 Intel Corporation Reduction of power consumption in memory devices during refresh modes
KR101975029B1 (ko) 2012-05-17 2019-08-23 삼성전자주식회사 리프레쉬 주기를 조절하는 반도체 메모리 장치, 메모리 시스템 및 그 동작방법
KR101980162B1 (ko) * 2012-06-28 2019-08-28 에스케이하이닉스 주식회사 메모리
US8898544B2 (en) 2012-12-11 2014-11-25 International Business Machines Corporation DRAM error detection, evaluation, and correction
US8887014B2 (en) 2012-12-11 2014-11-11 International Business Machines Corporation Managing errors in a DRAM by weak cell encoding
JP2015076110A (ja) * 2013-10-08 2015-04-20 マイクロン テクノロジー， インク． 半導体装置及びこれを備えるデータ処理システム
KR102087439B1 (ko) * 2013-12-19 2020-03-10 에스케이하이닉스 주식회사 반도체 장치 및 이를 이용한 집적회로
CN108231109B (zh) * 2014-06-09 2021-01-29 华为技术有限公司 动态随机存取存储器dram的刷新方法、设备以及系统
US12020740B2 (en) 2018-06-26 2024-06-25 Rambus Inc. Memory device having non-uniform refresh
US11200001B2 (en) * 2020-05-15 2021-12-14 Micron Technology, Inc. Management of power during memory device reset and initialization

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5873096A (ja) * 1981-10-27 1983-05-02 Nec Corp 半導体メモリ
JPH02192096A (ja) 1989-01-20 1990-07-27 Hitachi Ltd 選択的リフレツシユ制御装置
US5262998A (en) * 1991-08-14 1993-11-16 Micron Technology, Inc. Dynamic random access memory with operational sleep mode
KR0126243B1 (ko) * 1992-06-29 1997-12-26 세끼자와 다다시 자기재생기능을 갖는 반도체 메모리장치
US5331601A (en) * 1993-02-04 1994-07-19 United Memories, Inc. DRAM variable row select
JP3302847B2 (ja) * 1994-12-02 2002-07-15 富士通株式会社 記憶装置
JP2792486B2 (ja) 1995-10-27 1998-09-03 日本電気株式会社 半導体記憶装置
JPH09161478A (ja) * 1995-12-12 1997-06-20 Mitsubishi Electric Corp 半導体記憶装置
JPH10255468A (ja) 1997-03-12 1998-09-25 Casio Comput Co Ltd Ｄｒａｍのリフレッシュ装置
KR100276386B1 (ko) * 1997-12-06 2001-01-15 윤종용 반도체메모리장치의리프레시방법및회로
US6208577B1 (en) * 1999-04-16 2001-03-27 Micron Technology, Inc. Circuit and method for refreshing data stored in a memory cell

Also Published As

Publication number Publication date
US6349068B2 (en) 2002-02-19
JP2000298982A (ja) 2000-10-24
US20010012230A1 (en) 2001-08-09
US6215714B1 (en) 2001-04-10

Similar Documents

Publication Publication Date Title
JP4056173B2 (ja) 半導体記憶装置および該半導体記憶装置のリフレッシュ方法
EP1858025B1 (en) Semiconductor memory operated by internal and external refresh
US7701753B2 (en) Apparatus and method for self-refreshing dynamic random access memory cells
US6829192B2 (en) Semiconductor memory
JP4194561B2 (ja) 半導体記憶装置
JP2000298982A5 (enExample)
JP7064633B1 (ja) 半導体メモリ装置
US20080285370A1 (en) Semiconductor memory and system
JP2002358780A (ja) ダイナミックメモリにおけるリフレッシュ方法
US7269085B2 (en) Non volatile semiconductor memory device having a multi-bit cell array
US7362643B2 (en) Semiconductor-memory device and bank refresh method
US20030053366A1 (en) Circuit for generating internal address in semiconductor memory device
US6570802B2 (en) Semiconductor memory device
US7154799B2 (en) Semiconductor memory with single cell and twin cell refreshing
JP2006146992A (ja) 半導体メモリ装置
JP2004185686A (ja) 半導体記憶装置
US7203114B2 (en) Semiconductor memory which performs the refresh operation internally and automatically without refresh commands from the exterior
JP2007280608A (ja) 半導体記憶装置
JPH0644773A (ja) ダイナミック型半導体メモリ
JP2002203389A (ja) 半導体メモリ
JP2000260180A (ja) 半導体メモリ
JP2000021163A (ja) 記憶装置のリフレッシュ制御回路

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20060609

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20060704

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060901

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070227

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070501

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20070529

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070727

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20070817

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20071016

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20071023

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20071113

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20071211

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101221

Year of fee payment: 3

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101221

Year of fee payment: 3

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111221

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111221

Year of fee payment: 4

S531 Written request for registration of change of domicile

Free format text: JAPANESE INTERMEDIATE CODE: R313531

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111221

Year of fee payment: 4

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20111221

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121221

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20121221

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20131221

Year of fee payment: 6

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

EXPY Cancellation because of completion of term