JP4046382B2 - 半導体集積回路装置 - Google Patents

半導体集積回路装置 Download PDF

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Publication number
JP4046382B2
JP4046382B2 JP07616197A JP7616197A JP4046382B2 JP 4046382 B2 JP4046382 B2 JP 4046382B2 JP 07616197 A JP07616197 A JP 07616197A JP 7616197 A JP7616197 A JP 7616197A JP 4046382 B2 JP4046382 B2 JP 4046382B2
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JP
Japan
Prior art keywords
power supply
voltage
circuit
node
internal power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP07616197A
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English (en)
Japanese (ja)
Other versions
JPH10268000A5 (https=
JPH10268000A (ja
Inventor
玄 森下
正樹 築出
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP07616197A priority Critical patent/JP4046382B2/ja
Priority to KR1019970050905A priority patent/KR100274921B1/ko
Priority to US08/951,591 priority patent/US5917765A/en
Publication of JPH10268000A publication Critical patent/JPH10268000A/ja
Publication of JPH10268000A5 publication Critical patent/JPH10268000A5/ja
Application granted granted Critical
Publication of JP4046382B2 publication Critical patent/JP4046382B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • G11C29/50008Marginal testing, e.g. race, voltage or current testing of impedance
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/147Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/50Marginal testing, e.g. race, voltage or current testing
    • G11C2029/5004Voltage

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
JP07616197A 1997-03-27 1997-03-27 半導体集積回路装置 Expired - Fee Related JP4046382B2 (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP07616197A JP4046382B2 (ja) 1997-03-27 1997-03-27 半導体集積回路装置
KR1019970050905A KR100274921B1 (ko) 1997-03-27 1997-10-02 반도체 집적 회로 장치
US08/951,591 US5917765A (en) 1997-03-27 1997-10-16 Semiconductor memory device capable of burn in mode operation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP07616197A JP4046382B2 (ja) 1997-03-27 1997-03-27 半導体集積回路装置

Publications (3)

Publication Number Publication Date
JPH10268000A JPH10268000A (ja) 1998-10-09
JPH10268000A5 JPH10268000A5 (https=) 2005-02-17
JP4046382B2 true JP4046382B2 (ja) 2008-02-13

Family

ID=13597347

Family Applications (1)

Application Number Title Priority Date Filing Date
JP07616197A Expired - Fee Related JP4046382B2 (ja) 1997-03-27 1997-03-27 半導体集積回路装置

Country Status (3)

Country Link
US (1) US5917765A (https=)
JP (1) JP4046382B2 (https=)
KR (1) KR100274921B1 (https=)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5835438A (en) * 1996-12-24 1998-11-10 Mosaid Technologies Incorporated Precharge-enable self boosting word line driver for an embedded DRAM
JP4074697B2 (ja) * 1997-11-28 2008-04-09 株式会社ルネサステクノロジ 半導体装置
KR19990047008A (ko) * 1997-12-02 1999-07-05 구본준 외부조건 변화에 둔감한 기준전압 발생회로
JPH11185498A (ja) * 1997-12-24 1999-07-09 Mitsubishi Electric Corp スタティック型半導体記憶装置
US6119252A (en) * 1998-02-10 2000-09-12 Micron Technology Integrated circuit test mode with externally forced reference voltage
JPH11288588A (ja) * 1998-04-02 1999-10-19 Mitsubishi Electric Corp 半導体回路装置
JP2000021170A (ja) * 1998-04-30 2000-01-21 Mitsubishi Electric Corp 半導体集積回路装置
KR100294021B1 (ko) * 1998-09-08 2001-07-12 윤종용 메모리모듈의테스트장치
JP3459192B2 (ja) * 1999-03-26 2003-10-20 沖電気工業株式会社 半導体集積回路
JP3478996B2 (ja) * 1999-06-01 2003-12-15 Necエレクトロニクス株式会社 低振幅ドライバ回路及びこれを含む半導体装置
KR100576491B1 (ko) * 1999-12-23 2006-05-09 주식회사 하이닉스반도체 이중 내부전압 발생장치
DE10014388A1 (de) 2000-03-23 2001-10-04 Infineon Technologies Ag Verfahren zur Durchführung eines Burn-in-Prozesses eines Speichers
JP3602028B2 (ja) * 2000-03-27 2004-12-15 沖電気工業株式会社 半導体集積回路
DE10050761A1 (de) * 2000-10-13 2002-05-16 Infineon Technologies Ag Spannungsregelungsschaltung, insbelondere für Halbleiterspeicher
JP2002124637A (ja) * 2000-10-18 2002-04-26 Oki Micro Design Co Ltd 半導体集積回路
KR100383261B1 (ko) * 2001-03-12 2003-05-09 삼성전자주식회사 반도체 메모리 장치 및 이 장치의 입력신호 버퍼방법
JP2003059297A (ja) * 2001-08-08 2003-02-28 Mitsubishi Electric Corp 半導体記憶装置およびそれを用いた半導体モジュール
KR100422952B1 (ko) * 2002-06-14 2004-03-16 주식회사 하이닉스반도체 반도체 메모리의 비트라인 균등화 신호 제어회로
JP4286085B2 (ja) * 2003-07-28 2009-06-24 Okiセミコンダクタ株式会社 増幅器及びそれを用いた半導体記憶装置
JP2005135458A (ja) * 2003-10-28 2005-05-26 Renesas Technology Corp 半導体記憶装置
US7221206B2 (en) * 2004-03-18 2007-05-22 Denso Corporation Integrated circuit device having clock signal output circuit
JP2006332456A (ja) * 2005-05-27 2006-12-07 Fujitsu Ltd 半導体装置及び試験モード設定方法
JP5038616B2 (ja) 2005-11-14 2012-10-03 ルネサスエレクトロニクス株式会社 半導体集積回路
JP4774000B2 (ja) * 2007-03-19 2011-09-14 富士通セミコンダクター株式会社 半導体集積回路及び半導体集積回路が組み込まれた半導体装置
KR20100103303A (ko) * 2009-03-13 2010-09-27 삼성전자주식회사 신뢰성 평가회로 및 신뢰성 평가시스템
KR101003153B1 (ko) * 2009-05-15 2010-12-21 주식회사 하이닉스반도체 전압 안정화 회로 및 이를 이용한 반도체 메모리 장치
KR102171261B1 (ko) * 2013-12-27 2020-10-28 삼성전자 주식회사 다수의 전압 발생부들을 갖는 메모리 장치
US10978111B1 (en) * 2019-12-05 2021-04-13 Winbond Electronics Corp. Sense amplifier circuit with reference voltage holding circuit for maintaining sense amplifier reference voltage when the sense amplifier operates under standby mode
CN118351895A (zh) * 2023-01-06 2024-07-16 长鑫存储技术有限公司 半导体存储装置的电源供应电路和半导体存储装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04205887A (ja) * 1990-11-30 1992-07-28 Hitachi Ltd 半導体集積回路装置
JPH04243098A (ja) * 1991-01-16 1992-08-31 Matsushita Electron Corp 半導体記憶装置
JP2865486B2 (ja) * 1992-07-02 1999-03-08 三菱電機株式会社 半導体記憶装置
JP2768172B2 (ja) * 1992-09-30 1998-06-25 日本電気株式会社 半導体メモリ装置
KR0141466B1 (ko) * 1992-10-07 1998-07-15 모리시타 요이찌 내부 강압회로

Also Published As

Publication number Publication date
KR19980079393A (ko) 1998-11-25
JPH10268000A (ja) 1998-10-09
KR100274921B1 (ko) 2001-01-15
US5917765A (en) 1999-06-29

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