JP4044721B2 - 半導体集積回路装置の製造方法 - Google Patents

半導体集積回路装置の製造方法 Download PDF

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Publication number
JP4044721B2
JP4044721B2 JP2000246505A JP2000246505A JP4044721B2 JP 4044721 B2 JP4044721 B2 JP 4044721B2 JP 2000246505 A JP2000246505 A JP 2000246505A JP 2000246505 A JP2000246505 A JP 2000246505A JP 4044721 B2 JP4044721 B2 JP 4044721B2
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misfet
film
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JP2002064154A5 (enExample
JP2002064154A (ja
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文雄 大塚
勝彦 一瀬
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Renesas Technology Corp
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Renesas Technology Corp
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Priority to JP2000246505A priority Critical patent/JP4044721B2/ja
Priority to TW090116166A priority patent/TW497253B/zh
Priority to KR1020010048954A priority patent/KR100547050B1/ko
Priority to US09/929,259 priority patent/US6613634B2/en
Publication of JP2002064154A publication Critical patent/JP2002064154A/ja
Publication of JP2002064154A5 publication Critical patent/JP2002064154A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2000246505A 2000-08-15 2000-08-15 半導体集積回路装置の製造方法 Expired - Fee Related JP4044721B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2000246505A JP4044721B2 (ja) 2000-08-15 2000-08-15 半導体集積回路装置の製造方法
TW090116166A TW497253B (en) 2000-08-15 2001-07-02 Semiconductor integrated circuit device and its manufacturing method
KR1020010048954A KR100547050B1 (ko) 2000-08-15 2001-08-14 반도체 집적 회로 장치의 제조 방법
US09/929,259 US6613634B2 (en) 2000-08-15 2001-08-15 Method of manufacturing a semiconductor device using oblique ion injection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000246505A JP4044721B2 (ja) 2000-08-15 2000-08-15 半導体集積回路装置の製造方法

Publications (3)

Publication Number Publication Date
JP2002064154A JP2002064154A (ja) 2002-02-28
JP2002064154A5 JP2002064154A5 (enExample) 2005-02-03
JP4044721B2 true JP4044721B2 (ja) 2008-02-06

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JP2000246505A Expired - Fee Related JP4044721B2 (ja) 2000-08-15 2000-08-15 半導体集積回路装置の製造方法

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US (1) US6613634B2 (enExample)
JP (1) JP4044721B2 (enExample)
KR (1) KR100547050B1 (enExample)
TW (1) TW497253B (enExample)

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US6756276B1 (en) * 2002-09-30 2004-06-29 Advanced Micro Devices, Inc. Strained silicon MOSFET having improved source/drain extension dopant diffusion resistance and method for its fabrication
KR100604911B1 (ko) 2004-10-20 2006-07-28 삼성전자주식회사 하부전극 콘택을 갖는 반도체 메모리 소자 및 그 제조방법
US20070148893A1 (en) * 2005-12-22 2007-06-28 Andrei Josiek Method of forming a doped semiconductor portion
JP4812480B2 (ja) * 2006-03-22 2011-11-09 富士通セミコンダクター株式会社 半導体装置の製造方法
US8305829B2 (en) * 2009-02-23 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Memory power gating circuit for controlling internal voltage of a memory array, system and method for controlling the same
US8305790B2 (en) * 2009-03-16 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Electrical anti-fuse and related applications
US8957482B2 (en) 2009-03-31 2015-02-17 Taiwan Semiconductor Manufacturing Company, Ltd. Electrical fuse and related applications
US8912602B2 (en) 2009-04-14 2014-12-16 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs and methods for forming the same
US8461015B2 (en) 2009-07-08 2013-06-11 Taiwan Semiconductor Manufacturing Company, Ltd. STI structure and method of forming bottom void in same
US8482073B2 (en) 2010-03-25 2013-07-09 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit including FINFETs and methods for forming the same
US8440517B2 (en) 2010-10-13 2013-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. FinFET and method of fabricating the same
US8759943B2 (en) 2010-10-08 2014-06-24 Taiwan Semiconductor Manufacturing Company, Ltd. Transistor having notched fin structure and method of making the same
US8629478B2 (en) 2009-07-31 2014-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Fin structure for high mobility multiple-gate transistor
US8298925B2 (en) 2010-11-08 2012-10-30 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming ultra shallow junction
US8472227B2 (en) 2010-01-27 2013-06-25 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuits and methods for forming the same
US8980719B2 (en) 2010-04-28 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for doping fin field-effect transistors
US8264021B2 (en) * 2009-10-01 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Finfets and methods for forming the same
US8497528B2 (en) 2010-05-06 2013-07-30 Taiwan Semiconductor Manufacturing Company, Ltd. Method for fabricating a strained structure
US9484462B2 (en) 2009-09-24 2016-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Fin structure of fin field effect transistor
US8623728B2 (en) 2009-07-28 2014-01-07 Taiwan Semiconductor Manufacturing Company, Ltd. Method for forming high germanium concentration SiGe stressor
US8187928B2 (en) 2010-09-21 2012-05-29 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of forming integrated circuits
US8264032B2 (en) 2009-09-01 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Accumulation type FinFET, circuits and fabrication method thereof
US20110097867A1 (en) * 2009-10-22 2011-04-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method of controlling gate thicknesses in forming fusi gates
US9040393B2 (en) 2010-01-14 2015-05-26 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming semiconductor structure
US8603924B2 (en) 2010-10-19 2013-12-10 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of forming gate dielectric material
US9048181B2 (en) 2010-11-08 2015-06-02 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming ultra shallow junction
US8769446B2 (en) 2010-11-12 2014-07-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method and device for increasing fin device density for unaligned fins
US8592915B2 (en) 2011-01-25 2013-11-26 Taiwan Semiconductor Manufacturing Company, Ltd. Doped oxide for shallow trench isolation (STI)
US8877602B2 (en) 2011-01-25 2014-11-04 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms of doping oxide for forming shallow trench isolation
US8580675B2 (en) * 2011-03-02 2013-11-12 Texas Instruments Incorporated Two-track cross-connect in double-patterned structure using rectangular via
US8431453B2 (en) 2011-03-31 2013-04-30 Taiwan Semiconductor Manufacturing Company, Ltd. Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure
WO2013018156A1 (ja) * 2011-07-29 2013-02-07 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
TWI430449B (zh) * 2011-09-29 2014-03-11 Anpec Electronics Corp 橫向堆疊式超級接面功率半導體元件
US10032674B2 (en) * 2015-12-07 2018-07-24 International Business Machines Corporation Middle of the line subtractive self-aligned contacts

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5372957A (en) * 1993-07-22 1994-12-13 Taiwan Semiconductor Manufacturing Company Multiple tilted angle ion implantation MOSFET method
JP4198201B2 (ja) * 1995-06-02 2008-12-17 株式会社ルネサステクノロジ 半導体装置
US5534449A (en) * 1995-07-17 1996-07-09 Micron Technology, Inc. Methods of forming complementary metal oxide semiconductor (CMOS) integrated circuitry
JP3535615B2 (ja) 1995-07-18 2004-06-07 株式会社ルネサステクノロジ 半導体集積回路装置
JPH0955440A (ja) 1995-08-17 1997-02-25 Sony Corp 半導体装置及び半導体装置の製造方法
JPH09129753A (ja) 1995-11-01 1997-05-16 Sony Corp 半導体装置
KR19990052693A (ko) * 1997-12-23 1999-07-15 구본준 플래쉬 메모리 셀의 제조방법
JP2000040749A (ja) * 1998-07-24 2000-02-08 Matsushita Electronics Industry Corp 半導体装置の製造方法
JP3239853B2 (ja) * 1998-08-25 2001-12-17 日本電気株式会社 半導体装置の製造方法
KR100431324B1 (ko) * 1998-09-29 2004-06-16 주식회사 하이닉스반도체 반도체장치의 제조방법

Also Published As

Publication number Publication date
US6613634B2 (en) 2003-09-02
KR100547050B1 (ko) 2006-02-01
KR20020013809A (ko) 2002-02-21
US20020024106A1 (en) 2002-02-28
JP2002064154A (ja) 2002-02-28
TW497253B (en) 2002-08-01

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