JP3938803B2 - ダイナミック型ｒａｍ - Google Patents

ダイナミック型ｒａｍ Download PDF

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Publication number
JP3938803B2
JP3938803B2 JP09665197A JP9665197A JP3938803B2 JP 3938803 B2 JP3938803 B2 JP 3938803B2 JP 09665197 A JP09665197 A JP 09665197A JP 9665197 A JP9665197 A JP 9665197A JP 3938803 B2 JP3938803 B2 JP 3938803B2
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JP
Japan
Prior art keywords
sub
word
line
selection
word line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP09665197A
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English (en)
Japanese (ja)
Other versions
JPH10275468A5 (enExample
JPH10275468A (ja
Inventor
勉 高橋
公司 荒井
康 ▲高▼橋
敦也 田中
俊一 助川
真次 別所
雅之 平
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP09665197A priority Critical patent/JP3938803B2/ja
Priority to TW087103213A priority patent/TW417285B/zh
Priority to KR1019980010224A priority patent/KR19980080620A/ko
Priority to US09/050,946 priority patent/US8068379B1/en
Publication of JPH10275468A publication Critical patent/JPH10275468A/ja
Publication of JPH10275468A5 publication Critical patent/JPH10275468A5/ja
Application granted granted Critical
Publication of JP3938803B2 publication Critical patent/JP3938803B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/48—Data lines or contacts therefor
    • H10B12/488—Word lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4085—Word line control circuits, e.g. word line drivers, - boosters, - pull-up, - pull-down, - precharge
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/408—Address circuits
    • G11C11/4087—Address decoders, e.g. bit - or word line decoders; Multiple line decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85—Complementary IGFETs, e.g. CMOS
    • H10D84/853—Complementary IGFETs, e.g. CMOS comprising FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
JP09665197A 1997-03-31 1997-03-31 ダイナミック型ｒａｍ Expired - Lifetime JP3938803B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP09665197A JP3938803B2 (ja) 1997-03-31 1997-03-31 ダイナミック型ｒａｍ
TW087103213A TW417285B (en) 1997-03-31 1998-03-05 Dynamic RAM
KR1019980010224A KR19980080620A (ko) 1997-03-31 1998-03-25 다이나믹형 ｒａｍ
US09/050,946 US8068379B1 (en) 1997-03-31 1998-03-31 Dynamic RAM

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP09665197A JP3938803B2 (ja) 1997-03-31 1997-03-31 ダイナミック型ｒａｍ

Publications (3)

Publication Number Publication Date
JPH10275468A JPH10275468A (ja) 1998-10-13
JPH10275468A5 JPH10275468A5 (enExample) 2005-02-10
JP3938803B2 true JP3938803B2 (ja) 2007-06-27

Family

ID=14170742

Family Applications (1)

Application Number Title Priority Date Filing Date
JP09665197A Expired - Lifetime JP3938803B2 (ja) 1997-03-31 1997-03-31 ダイナミック型ｒａｍ

Country Status (4)

Country Link
US (1) US8068379B1 (enExample)
JP (1) JP3938803B2 (enExample)
KR (1) KR19980080620A (enExample)
TW (1) TW417285B (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3869045B2 (ja) * 1995-11-09 2007-01-17 株式会社日立製作所 半導体記憶装置
JP2000187984A (ja) * 1998-12-24 2000-07-04 Matsushita Electric Ind Co Ltd 半導体記憶装置及び副ワード線駆動信号発生回路
US6088287A (en) * 1999-08-23 2000-07-11 Advanced Micro Devices, Inc. Flash memory architecture employing three layer metal interconnect for word line decoding
KR100558561B1 (ko) 2004-10-28 2006-03-10 삼성전자주식회사 반도체 메모리 장치
KR100666181B1 (ko) * 2005-12-27 2007-01-09 삼성전자주식회사 센스앰프 및 워드라인 드라이버 영역을 위한 면적을최소화하는 레이아웃을 가지는 반도체 메모리 장치
JP2006270126A (ja) * 2006-06-22 2006-10-05 Matsushita Electric Ind Co Ltd 半導体集積回路装置
JP4949360B2 (ja) * 2008-11-27 2012-06-06 エルピーダメモリ株式会社 半導体記憶装置
WO2014123064A1 (ja) * 2013-02-05 2014-08-14 ピーエスフォー ルクスコ エスエイアールエル 半導体装置
US9711215B2 (en) * 2013-09-27 2017-07-18 Intel Corporation Apparatus and method to optimize STT-MRAM size and write error rate
WO2015065462A1 (en) 2013-10-31 2015-05-07 Intel Corporation Apparatus for improving read and write operations of a nonvolatile memory
US10236036B2 (en) * 2017-05-09 2019-03-19 Micron Technology, Inc. Sense amplifier signal boost
US10566036B2 (en) 2018-06-15 2020-02-18 Micron Technology, Inc. Apparatuses and method for reducing sense amplifier leakage current during active power-down
CN116486847B (zh) * 2022-01-14 2026-06-05 长鑫存储技术有限公司 存储装置
CN117672337A (zh) * 2022-08-23 2024-03-08 长鑫存储技术有限公司 存储器及其存储系统
CN121442682A (zh) * 2024-07-29 2026-01-30 华为技术有限公司 存储阵列、存储器和电子设备

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0817035B2 (ja) 1988-12-09 1996-02-21 三菱電機株式会社 半導体メモリ装置
KR0164377B1 (ko) * 1995-07-15 1999-02-18 김광호 반도체 메모리장치의 서브워드라인 드라이버
JPH0973776A (ja) * 1995-09-07 1997-03-18 Mitsubishi Electric Corp 同期型半導体記憶装置
KR100186300B1 (ko) * 1996-04-04 1999-04-15 문정환 계층적 워드라인 구조를 갖는 반도체 메모리 소자

Also Published As

Publication number Publication date
KR19980080620A (ko) 1998-11-25
US8068379B1 (en) 2011-11-29
JPH10275468A (ja) 1998-10-13
TW417285B (en) 2001-01-01

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