JP3615979B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP3615979B2 JP3615979B2 JP2000013895A JP2000013895A JP3615979B2 JP 3615979 B2 JP3615979 B2 JP 3615979B2 JP 2000013895 A JP2000013895 A JP 2000013895A JP 2000013895 A JP2000013895 A JP 2000013895A JP 3615979 B2 JP3615979 B2 JP 3615979B2
- Authority
- JP
- Japan
- Prior art keywords
- film
- insulating film
- silicon
- atoms
- oxygen
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
- H10W20/085—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving intermediate temporary filling with material
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
- H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
- H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
- H10P14/6532—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
- H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
- H10W20/48—Insulating materials thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/495—Capacitive arrangements or effects of, or between wiring layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
- H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
- H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
- H10P14/6682—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
- H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
- H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
- H10P14/6684—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen
- H10P14/6686—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
- H10P14/69—Inorganic materials
- H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
- H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
- H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000013895A JP3615979B2 (ja) | 2000-01-18 | 2000-01-18 | 半導体装置及びその製造方法 |
| US09/760,777 US6358838B2 (en) | 2000-01-18 | 2001-01-17 | Semiconductor device and process for producing the same |
| TW090101031A TW513763B (en) | 2000-01-18 | 2001-01-17 | Semiconductor device and process for producing the same |
| KR1020010002929A KR100689917B1 (ko) | 2000-01-18 | 2001-01-18 | 반도체 장치 및 그 제조 방법 |
| US10/050,859 US6680541B2 (en) | 2000-01-18 | 2002-01-18 | Semiconductor device and process for producing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000013895A JP3615979B2 (ja) | 2000-01-18 | 2000-01-18 | 半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2001203200A JP2001203200A (ja) | 2001-07-27 |
| JP2001203200A5 JP2001203200A5 (https=) | 2004-12-24 |
| JP3615979B2 true JP3615979B2 (ja) | 2005-02-02 |
Family
ID=18541427
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000013895A Expired - Fee Related JP3615979B2 (ja) | 2000-01-18 | 2000-01-18 | 半導体装置及びその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US6358838B2 (https=) |
| JP (1) | JP3615979B2 (https=) |
| KR (1) | KR100689917B1 (https=) |
| TW (1) | TW513763B (https=) |
Families Citing this family (33)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000174123A (ja) * | 1998-12-09 | 2000-06-23 | Nec Corp | 半導体装置及びその製造方法 |
| US6500752B2 (en) * | 2000-07-21 | 2002-12-31 | Canon Sales Co., Inc. | Semiconductor device and semiconductor device manufacturing method |
| WO2002017693A1 (fr) * | 2000-08-18 | 2002-02-28 | Mitsubishi Denki Kabushiki Kaisha | Substrat d'installation, procede de montage d'un tel substrat et douille d'ampoule mettant en oeuvre ledit substrat |
| JP2002329722A (ja) * | 2001-04-27 | 2002-11-15 | Nec Corp | 半導体装置及びその製造方法 |
| US6699792B1 (en) * | 2001-07-17 | 2004-03-02 | Advanced Micro Devices, Inc. | Polymer spacers for creating small geometry space and method of manufacture thereof |
| US6887780B2 (en) * | 2001-08-31 | 2005-05-03 | Intel Corporation | Concentration graded carbon doped oxide |
| JP3913638B2 (ja) * | 2001-09-03 | 2007-05-09 | 東京エレクトロン株式会社 | 熱処理方法及び熱処理装置 |
| JP2003092349A (ja) * | 2001-09-18 | 2003-03-28 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
| JP4063619B2 (ja) * | 2002-03-13 | 2008-03-19 | Necエレクトロニクス株式会社 | 半導体装置の製造方法 |
| JP3516446B2 (ja) | 2002-04-26 | 2004-04-05 | 東京応化工業株式会社 | ホトレジスト剥離方法 |
| US7071112B2 (en) * | 2002-10-21 | 2006-07-04 | Applied Materials, Inc. | BARC shaping for improved fabrication of dual damascene integrated circuit features |
| US6867126B1 (en) * | 2002-11-07 | 2005-03-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method to increase cracking threshold for low-k materials |
| US20040152295A1 (en) * | 2003-02-03 | 2004-08-05 | International Business Machines Corporation | Sacrificial metal liner for copper |
| US7279410B1 (en) | 2003-03-05 | 2007-10-09 | Advanced Micro Devices, Inc. | Method for forming inlaid structures for IC interconnections |
| US8137764B2 (en) * | 2003-05-29 | 2012-03-20 | Air Products And Chemicals, Inc. | Mechanical enhancer additives for low dielectric films |
| US6767827B1 (en) | 2003-06-11 | 2004-07-27 | Advanced Micro Devices, Inc. | Method for forming dual inlaid structures for IC interconnections |
| US6919636B1 (en) * | 2003-07-31 | 2005-07-19 | Advanced Micro Devices, Inc. | Interconnects with a dielectric sealant layer |
| TWI285938B (en) * | 2003-08-28 | 2007-08-21 | Fujitsu Ltd | Semiconductor device |
| JP4282493B2 (ja) * | 2004-01-15 | 2009-06-24 | 株式会社東芝 | 膜形成方法及び基板処理装置 |
| TW200605220A (en) * | 2004-06-21 | 2006-02-01 | Hitachi Chemical Co Ltd | Organic siloxane film, semiconductor device using same, flat panel display and raw material liquid |
| JP4854938B2 (ja) | 2004-07-06 | 2012-01-18 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
| US7202564B2 (en) * | 2005-02-16 | 2007-04-10 | International Business Machines Corporation | Advanced low dielectric constant organosilicon plasma chemical vapor deposition films |
| US7332428B2 (en) * | 2005-02-28 | 2008-02-19 | Infineon Technologies Ag | Metal interconnect structure and method |
| US7214612B2 (en) * | 2005-08-31 | 2007-05-08 | United Microelectronics Corp. | Dual damascene structure and fabrication thereof |
| US7410899B2 (en) * | 2005-09-20 | 2008-08-12 | Enthone, Inc. | Defectivity and process control of electroless deposition in microelectronics applications |
| JP5154009B2 (ja) * | 2005-10-21 | 2013-02-27 | 株式会社ジャパンディスプレイイースト | 有機シロキサン系絶縁膜の製造方法、及び、この製造方法で製造した有機シロキサン系絶縁膜を層間絶縁として用いた液晶表示装置の製造方法 |
| WO2007132879A1 (ja) * | 2006-05-17 | 2007-11-22 | Nec Corporation | 半導体装置、半導体装置の製造方法及び半導体製造装置 |
| US8637396B2 (en) | 2008-12-01 | 2014-01-28 | Air Products And Chemicals, Inc. | Dielectric barrier deposition using oxygen containing precursor |
| EP2306506B1 (en) * | 2009-10-01 | 2013-07-31 | ams AG | Method of producing a semiconductor device having a through-wafer interconnect |
| JP2013020530A (ja) * | 2011-07-13 | 2013-01-31 | Dainippon Printing Co Ltd | タッチセンサパネル部材、タッチセンサパネル部材を備えた表示装置、及びタッチセンサパネル部材の製造方法 |
| US10319630B2 (en) * | 2012-09-27 | 2019-06-11 | Stmicroelectronics, Inc. | Encapsulated damascene interconnect structure for integrated circuits |
| US8980740B2 (en) | 2013-03-06 | 2015-03-17 | Globalfoundries Inc. | Barrier layer conformality in copper interconnects |
| KR102756671B1 (ko) * | 2019-02-21 | 2025-01-17 | 삼성디스플레이 주식회사 | 감광성 수지 조성물, 이를 이용한 표시 장치 및 표시 장치의 제조 방법 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5407529A (en) * | 1992-03-04 | 1995-04-18 | Nec Corporation | Method for manufacturing semiconductor device |
| US6423651B1 (en) * | 1993-12-27 | 2002-07-23 | Kawasaki Steel Corporation | Insulating film of semiconductor device and coating solution for forming insulating film and method of manufacturing insulating film |
| US6326318B1 (en) * | 1995-09-14 | 2001-12-04 | Sanyo Electric Co., Ltd. | Process for producing semiconductor devices including an insulating layer with an impurity |
| US5989998A (en) * | 1996-08-29 | 1999-11-23 | Matsushita Electric Industrial Co., Ltd. | Method of forming interlayer insulating film |
| JP3726226B2 (ja) | 1998-02-05 | 2005-12-14 | 日本エー・エス・エム株式会社 | 絶縁膜及びその製造方法 |
| US6054379A (en) * | 1998-02-11 | 2000-04-25 | Applied Materials, Inc. | Method of depositing a low k dielectric with organo silane |
| US6068884A (en) * | 1998-04-28 | 2000-05-30 | Silcon Valley Group Thermal Systems, Llc | Method of making low κ dielectric inorganic/organic hybrid films |
| US6383951B1 (en) * | 1998-09-03 | 2002-05-07 | Micron Technology, Inc. | Low dielectric constant material for integrated circuit fabrication |
| US6255232B1 (en) * | 1999-02-11 | 2001-07-03 | Taiwan Semiconductor Manufacturing Company | Method for forming low dielectric constant spin-on-polymer (SOP) dielectric layer |
| US6312793B1 (en) * | 1999-05-26 | 2001-11-06 | International Business Machines Corporation | Multiphase low dielectric constant material |
| US6225238B1 (en) * | 1999-06-07 | 2001-05-01 | Allied Signal Inc | Low dielectric constant polyorganosilicon coatings generated from polycarbosilanes |
| EP1077479A1 (en) * | 1999-08-17 | 2001-02-21 | Applied Materials, Inc. | Post-deposition treatment to enchance properties of Si-O-C low K film |
| US6365528B1 (en) * | 2000-06-07 | 2002-04-02 | Lsi Logic Corporation | Low temperature process for forming a low dielectric constant fluorine and carbon-containing silicon oxide dielectric-material characterized by improved resistance to oxidation and good gap-filling capabilities |
-
2000
- 2000-01-18 JP JP2000013895A patent/JP3615979B2/ja not_active Expired - Fee Related
-
2001
- 2001-01-17 US US09/760,777 patent/US6358838B2/en not_active Expired - Lifetime
- 2001-01-17 TW TW090101031A patent/TW513763B/zh not_active IP Right Cessation
- 2001-01-18 KR KR1020010002929A patent/KR100689917B1/ko not_active Expired - Fee Related
-
2002
- 2002-01-18 US US10/050,859 patent/US6680541B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2001203200A (ja) | 2001-07-27 |
| US20020105085A1 (en) | 2002-08-08 |
| KR100689917B1 (ko) | 2007-03-09 |
| KR20010076349A (ko) | 2001-08-11 |
| US20010009295A1 (en) | 2001-07-26 |
| US6680541B2 (en) | 2004-01-20 |
| TW513763B (en) | 2002-12-11 |
| US6358838B2 (en) | 2002-03-19 |
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