TW513763B - Semiconductor device and process for producing the same - Google Patents

Semiconductor device and process for producing the same Download PDF

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Publication number
TW513763B
TW513763B TW090101031A TW90101031A TW513763B TW 513763 B TW513763 B TW 513763B TW 090101031 A TW090101031 A TW 090101031A TW 90101031 A TW90101031 A TW 90101031A TW 513763 B TW513763 B TW 513763B
Authority
TW
Taiwan
Prior art keywords
layer
atoms
insulating layer
atom
oxygen
Prior art date
Application number
TW090101031A
Other languages
English (en)
Chinese (zh)
Inventor
Takeshi Furusawa
Daisuke Ryuzaki
Noriyuki Sakuma
Shuntaro Machida
Kenji Hinode
Original Assignee
Hitachi Ltd
Hitachi Ulsi Sys Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi Ulsi Sys Co Ltd filed Critical Hitachi Ltd
Application granted granted Critical
Publication of TW513763B publication Critical patent/TW513763B/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H10W20/085—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures involving intermediate temporary filling with material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H10P14/6532—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour by exposure to a plasma
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/495—Capacitive arrangements or effects of, or between wiring layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6328—Deposition from the gas or vapour phase
    • H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6682—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6684—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H10P14/6686—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
TW090101031A 2000-01-18 2001-01-17 Semiconductor device and process for producing the same TW513763B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000013895A JP3615979B2 (ja) 2000-01-18 2000-01-18 半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
TW513763B true TW513763B (en) 2002-12-11

Family

ID=18541427

Family Applications (1)

Application Number Title Priority Date Filing Date
TW090101031A TW513763B (en) 2000-01-18 2001-01-17 Semiconductor device and process for producing the same

Country Status (4)

Country Link
US (2) US6358838B2 (https=)
JP (1) JP3615979B2 (https=)
KR (1) KR100689917B1 (https=)
TW (1) TW513763B (https=)

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JP2002329722A (ja) * 2001-04-27 2002-11-15 Nec Corp 半導体装置及びその製造方法
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US6887780B2 (en) * 2001-08-31 2005-05-03 Intel Corporation Concentration graded carbon doped oxide
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JP4063619B2 (ja) * 2002-03-13 2008-03-19 Ｎｅｃエレクトロニクス株式会社 半導体装置の製造方法
JP3516446B2 (ja) 2002-04-26 2004-04-05 東京応化工業株式会社 ホトレジスト剥離方法
US7071112B2 (en) * 2002-10-21 2006-07-04 Applied Materials, Inc. BARC shaping for improved fabrication of dual damascene integrated circuit features
US6867126B1 (en) * 2002-11-07 2005-03-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method to increase cracking threshold for low-k materials
US20040152295A1 (en) * 2003-02-03 2004-08-05 International Business Machines Corporation Sacrificial metal liner for copper
US7279410B1 (en) 2003-03-05 2007-10-09 Advanced Micro Devices, Inc. Method for forming inlaid structures for IC interconnections
US8137764B2 (en) * 2003-05-29 2012-03-20 Air Products And Chemicals, Inc. Mechanical enhancer additives for low dielectric films
US6767827B1 (en) 2003-06-11 2004-07-27 Advanced Micro Devices, Inc. Method for forming dual inlaid structures for IC interconnections
US6919636B1 (en) * 2003-07-31 2005-07-19 Advanced Micro Devices, Inc. Interconnects with a dielectric sealant layer
TWI285938B (en) * 2003-08-28 2007-08-21 Fujitsu Ltd Semiconductor device
JP4282493B2 (ja) * 2004-01-15 2009-06-24 株式会社東芝 膜形成方法及び基板処理装置
TW200605220A (en) * 2004-06-21 2006-02-01 Hitachi Chemical Co Ltd Organic siloxane film, semiconductor device using same, flat panel display and raw material liquid
JP4854938B2 (ja) 2004-07-06 2012-01-18 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US7202564B2 (en) * 2005-02-16 2007-04-10 International Business Machines Corporation Advanced low dielectric constant organosilicon plasma chemical vapor deposition films
US7332428B2 (en) * 2005-02-28 2008-02-19 Infineon Technologies Ag Metal interconnect structure and method
US7214612B2 (en) * 2005-08-31 2007-05-08 United Microelectronics Corp. Dual damascene structure and fabrication thereof
US7410899B2 (en) * 2005-09-20 2008-08-12 Enthone, Inc. Defectivity and process control of electroless deposition in microelectronics applications
JP5154009B2 (ja) * 2005-10-21 2013-02-27 株式会社ジャパンディスプレイイースト 有機シロキサン系絶縁膜の製造方法、及び、この製造方法で製造した有機シロキサン系絶縁膜を層間絶縁として用いた液晶表示装置の製造方法
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Also Published As

Publication number Publication date
JP2001203200A (ja) 2001-07-27
US20020105085A1 (en) 2002-08-08
JP3615979B2 (ja) 2005-02-02
KR100689917B1 (ko) 2007-03-09
KR20010076349A (ko) 2001-08-11
US20010009295A1 (en) 2001-07-26
US6680541B2 (en) 2004-01-20
US6358838B2 (en) 2002-03-19

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