JP3151346B2 - 半導体集積回路装置およびその製造方法ならびにその製造に用いるモールド金型 - Google Patents

半導体集積回路装置およびその製造方法ならびにその製造に用いるモールド金型

Info

Publication number
JP3151346B2
JP3151346B2 JP31084593A JP31084593A JP3151346B2 JP 3151346 B2 JP3151346 B2 JP 3151346B2 JP 31084593 A JP31084593 A JP 31084593A JP 31084593 A JP31084593 A JP 31084593A JP 3151346 B2 JP3151346 B2 JP 3151346B2
Authority
JP
Japan
Prior art keywords
semiconductor chip
leads
sealing body
integrated circuit
resin sealing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP31084593A
Other languages
English (en)
Japanese (ja)
Other versions
JPH07161876A (ja
Inventor
範夫 岸川
育生 吉田
哲哉 林田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP31084593A priority Critical patent/JP3151346B2/ja
Priority to TW083111106A priority patent/TW268143B/zh
Priority to EP94309126A priority patent/EP0657922B1/en
Priority to KR1019940033138A priority patent/KR950021459A/ko
Priority to DE69419881T priority patent/DE69419881T2/de
Priority to SG1996004848A priority patent/SG55074A1/en
Priority to CN94112942A priority patent/CN1059053C/zh
Publication of JPH07161876A publication Critical patent/JPH07161876A/ja
Priority to US08/848,566 priority patent/US5885852A/en
Application granted granted Critical
Publication of JP3151346B2 publication Critical patent/JP3151346B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
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    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
    • H01L23/49541Geometry of the lead-frame
    • H01L23/49548Cross section geometry
    • H01L23/49551Cross section geometry characterised by bent parts
    • H01L23/49555Cross section geometry characterised by bent parts the bent parts being the outer leads
    • HELECTRICITY
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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495Lead-frames or other flat leads
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    • H01L2224/45117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
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    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/4805Shape
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
JP31084593A 1993-12-10 1993-12-10 半導体集積回路装置およびその製造方法ならびにその製造に用いるモールド金型 Expired - Lifetime JP3151346B2 (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP31084593A JP3151346B2 (ja) 1993-12-10 1993-12-10 半導体集積回路装置およびその製造方法ならびにその製造に用いるモールド金型
TW083111106A TW268143B (enrdf_load_stackoverflow) 1993-12-10 1994-11-29
KR1019940033138A KR950021459A (ko) 1993-12-10 1994-12-07 측면에 플랜지를 가진 패케지 반도체장치 및 그 제조방법
DE69419881T DE69419881T2 (de) 1993-12-10 1994-12-07 Verpackte Halbeiteranordnung und deren Herstellungsverfahren
EP94309126A EP0657922B1 (en) 1993-12-10 1994-12-07 A packaged semiconductor device and method of its manufacture
SG1996004848A SG55074A1 (en) 1993-12-10 1994-12-07 A packaged semiconductor device and method of its manufacture
CN94112942A CN1059053C (zh) 1993-12-10 1994-12-09 侧面有凸缘的密封式半导体器件及其制造方法
US08/848,566 US5885852A (en) 1993-12-10 1997-04-28 Packaged semiconductor device having a flange at its side surface and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31084593A JP3151346B2 (ja) 1993-12-10 1993-12-10 半導体集積回路装置およびその製造方法ならびにその製造に用いるモールド金型

Publications (2)

Publication Number Publication Date
JPH07161876A JPH07161876A (ja) 1995-06-23
JP3151346B2 true JP3151346B2 (ja) 2001-04-03

Family

ID=18010087

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31084593A Expired - Lifetime JP3151346B2 (ja) 1993-12-10 1993-12-10 半導体集積回路装置およびその製造方法ならびにその製造に用いるモールド金型

Country Status (8)

Country Link
US (1) US5885852A (enrdf_load_stackoverflow)
EP (1) EP0657922B1 (enrdf_load_stackoverflow)
JP (1) JP3151346B2 (enrdf_load_stackoverflow)
KR (1) KR950021459A (enrdf_load_stackoverflow)
CN (1) CN1059053C (enrdf_load_stackoverflow)
DE (1) DE69419881T2 (enrdf_load_stackoverflow)
SG (1) SG55074A1 (enrdf_load_stackoverflow)
TW (1) TW268143B (enrdf_load_stackoverflow)

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US6033934A (en) * 1997-12-09 2000-03-07 Orient Semiconductor Electronics Ltd. Semiconductor chip fabrication method and apparatus therefor
WO1999049512A1 (fr) * 1998-03-20 1999-09-30 Hitachi, Ltd. Dispositif a semi-conducteur et procede de fabrication associe
MY133357A (en) * 1999-06-30 2007-11-30 Hitachi Ltd A semiconductor device and a method of manufacturing the same
US6426565B1 (en) 2000-03-22 2002-07-30 International Business Machines Corporation Electronic package and method of making same
US6355502B1 (en) * 2000-04-25 2002-03-12 National Science Council Semiconductor package and method for making the same
US6395998B1 (en) 2000-09-13 2002-05-28 International Business Machines Corporation Electronic package having an adhesive retaining cavity
JP3722058B2 (ja) * 2001-12-07 2005-11-30 ヤマハ株式会社 半導体素子の製造方法及び製造装置
US20030176022A1 (en) * 2002-03-13 2003-09-18 Kurt Waldner Tool and method for welding to IC frames
CN100378937C (zh) * 2002-05-31 2008-04-02 威宇科技测试封装有限公司 利用焊线技术在芯片上布线的方法
JP5333402B2 (ja) * 2010-10-06 2013-11-06 三菱電機株式会社 半導体装置の製造方法
CN103715163B (zh) * 2013-12-31 2017-01-04 日月光封装测试(上海)有限公司 引线框架及半导体封装
CN106182581A (zh) * 2016-07-25 2016-12-07 胡小庆 一种电子芯片的制备方法及电子芯片

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JPS5828841A (ja) * 1981-08-14 1983-02-19 Toshiba Corp 樹脂封止型半導体装置の製造方法
JPS595651A (ja) * 1982-07-01 1984-01-12 Fujitsu Ltd 樹脂封止型半導体装置およびその製造方法
JPS60241246A (ja) * 1984-05-16 1985-11-30 Hitachi Micro Comput Eng Ltd リ−ド固定治具
JPS6151933A (ja) * 1984-08-22 1986-03-14 Hitachi Ltd 半導体装置の製法
JPS63107152A (ja) * 1986-10-24 1988-05-12 Hitachi Ltd 樹脂封止型電子部品
JPS63131557A (ja) * 1986-11-21 1988-06-03 Hitachi Ltd レジン封止型半導体装置用リ−ドフレ−ム及びレジン封止型半導体装置
JPS63138743A (ja) * 1986-12-01 1988-06-10 Nec Corp 半導体装置の製造方法
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JPH05243448A (ja) * 1992-02-28 1993-09-21 Nec Kyushu Ltd 集積回路用パッケージ

Also Published As

Publication number Publication date
SG55074A1 (en) 1998-12-21
EP0657922A1 (en) 1995-06-14
JPH07161876A (ja) 1995-06-23
DE69419881T2 (de) 2000-03-16
EP0657922B1 (en) 1999-08-04
US5885852A (en) 1999-03-23
TW268143B (enrdf_load_stackoverflow) 1996-01-11
CN1107256A (zh) 1995-08-23
CN1059053C (zh) 2000-11-29
DE69419881D1 (de) 1999-09-09
KR950021459A (ko) 1995-07-26

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