CN1059053C - 侧面有凸缘的密封式半导体器件及其制造方法 - Google Patents

侧面有凸缘的密封式半导体器件及其制造方法 Download PDF

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CN1059053C
CN1059053C CN94112942A CN94112942A CN1059053C CN 1059053 C CN1059053 C CN 1059053C CN 94112942 A CN94112942 A CN 94112942A CN 94112942 A CN94112942 A CN 94112942A CN 1059053 C CN1059053 C CN 1059053C
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lead
wire
semiconductor chip
electric insulation
lead frame
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CN1107256A (zh
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岸川范夫
吉田育生
林田哲哉
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Renesas Electronics Corp
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Abstract

为制作密封式半导体器件，将引线架连同电绝缘条与半导体芯片一起放入一套有上下凹模的模具内。该模具的上下凹模有互不相同的决定模具内腔的凹陷面积，将模制材料注入内腔，提供一模制封装，包封半导体芯片和各引线的一部分。该密封式半导体器件具有凸缘状侧表面，在凸缘状侧表面的台阶和引线中间部分之间设有绝缘条，该中间部分介于包封在模制封装内的引线第一部分和从该凸缘状侧表面伸出的引线第二部分之间。绝缘填充物填充在与引线中间部分外侧毗连的那部分引线第二部分之间的间隙内。

Description

侧面有凸缘的密封式半导体器件及其制造方法
本发明涉及一种密封式半导体器件及其制造工艺技术，特别是涉及适用于具有许多管脚或管脚排列间距小的LSI封装如QFP(方形扁平封装)的工艺技术。
在用于LSI封装的引线架中配备了密封条。密封条是设置在引线架各引线中间部分的部件，以使相互邻近的引线联在一起，并具有当用树脂模压装配在引线架上的半导体芯片时，防止注入模具内的软化树脂经由各引线间的空间流到模具之外。它还起到防止引线变形的支撑部件的作用。用树脂模制半导体芯片之后，借助于切割工具如冲压机等，切掉密封条。
但是，近年来对用于封装含有许多管脚的LSI的引线架，因管脚或引线数目的增多、管脚排列间距的变窄来得迅猛，则越来越难以通过冲压来切割密封条。
所以，取代这种由金属板将密封条和引线形成于一体的引线架，已提出所谓的带状密封技术(JP-A-58-28841，1983、2、19公开)，其中将薄绝缘带用于无密封条的引线架；并在树脂模制操作中，使该带压在各引线之间将绝缘带的压制件用作密封条。根据这种带密封技术，因该带是由绝缘材料制成的，无须在树脂模制后切割密封条，这就可增多管脚或引线数目亦缩小管脚的排列间距。
在USSN 08/161,374(1993，12、2申请)和美国专利No 5,106,784(1992、4、21授权)中也公开了与带密封技术相类似的技术。
本发明基于将在图1和图2所描述的本发明人的知识。因而图1和图2所示的结构本身是未公开的。图1表示设有经本发明人研究的带状密封的引线架100装配于一套模具的一种状态。
一套模具包括：一个上凹模101a和一个下凹模101b，而引线架100位于下凹模101b的上表面上。引线架包括引线102和管芯衬垫部分103。由绝缘材料如聚酰亚胺树脂制成的薄密封带104通过粘结剂粘在引线架100的引线102一表面的一部分。粘在管芯衬垫部分103上表面的半导体芯片105通过焊丝106与引线102电连接。
为了用树脂模制半导体芯片105，使上模101a与下模101b处于相互紧密接触的状态，并压紧。然后，将施加于引线架100的一个表面(在图1所示的实例中为上表面)的密封带104放置在待挤压的上凹模101a和下凹模101b之间，以使它填满各引线102间的空间，形成密封塞。
接着，将软化的树脂注入模具的内腔，使半导体芯片105密封。在此时，因部分绝缘带104填满了相邻引线102间的空间，形成密封塞，软化的树脂不会经由这些空间流到模具之外。
此后，从模具取出引线架100，并使引线102经镀焊料处理。再通过冲压切掉引线架100的不需要部分，然后，使引线102弯曲成预定形状而完成LSI封装。
在用于装配LSI封装，如以QFP为代表的封装的模具中，上凹模101a和下凹模101b是对称的，如图1所示。
已经发现，当使一个表面上施加密封带的引线架100装配在这种待压的模具上时，因为引线102的内引线和外引线部分间的边界部分  的下表面直接被下凹模挤压，而边界部分的上表面通过密封带104被上凹模101a挤压，使引线102的内引线部分，向施加密封带表面的相反方向(向下)弯曲，如图2所示。还发现，当密封带施加于引线架的下表面的场合，使引线向上弯曲。
结果，使半导体芯片105与引线102连接的焊丝106变形(因扭转而扭曲)，这导致模制缺陷，如焊丝变短和管芯衬垫部位103(以及半导体芯105)的倾斜。
在此情况下，假若密封带104被施加在引线架100的两个表面，因负荷均衡地施加于引线102边界部位的上、下两面，内引线部分不会产生弯曲。但是，按此法，因绝缘带是被冲压机或类似机械，在模具内挤压时，从上、下两方挤入各引线间的空间，由于引线架100的引线排列间隔小，使引线沿横向变形，加宽了其间的空间。
本发明之目的在于提供一种能在用模具挤压设有密封带的引线架时，有效地防止内引线弯曲的工艺技术。
依照本发明的一种方案，为制作密封式半导体器件，将一带有电绝缘条状部件和一半导体芯片的引线架全放于具有上、下模的模具内。上、下模有决定模具内腔尺寸的互不相同的凹陷区域，内腔尺寸是沿垂直挤压两模运动(方向)的方向测定的。引线架之安置应使带有绝缘条状部件的各引线表面与上、下两凹模中具有较大凹陷区域的那个模相接触，使模具的模制线与绝缘条状部件相交。使模具合拢，挤压引线架，将在模制线外侧的那部分条状部件推压进入相邻引线间的空间中，形成模具的内腔。将模制材料注入内腔，提供一个包封半导体芯片和各引线部分的模制封装。
根据本发明的另一方案，一种密封式半导体器件具有一凸缘状侧表面，在凸缘状侧表面的台阶和引线的中间部位之间设有电绝缘条，该引线位于模制封装内所包封的引线第一部分和从凸缘状侧表面伸出的引线第二部分之间。使与绝缘条材料相同的绝缘填充物填充到引线第二部分的那些外部与引线中间部位毗连的部分间的空间中。
根据本发明的又一方案，一种制造密封式半导体器件的方法，使用具有彼此不同的，决定模具内腔尺寸的凹陷面积的模具来模制装配在加有密封带的引线架上的半导体芯片。
当装配到模具的引线架受到上凹模和下凹模的挤压时，在各引线的外引线部分和内引线部分之间的边界部分，其主表面之一受凹模挤压，而另一主表面经由软密封带受上凹模挤压。
由于决定模具内腔尺寸的凹陷面积，对上凹模和下凹模来说是不同的，因在上凹模内侧壁的端部和下凹模内侧壁端部之间存在位置偏移或位移，所以就可防止引线的内引线部分(那些被包封在模制封装内的引线部分)向上、向下弯曲。
图1和图2是表示经本发明人研究的制造密封式半导体器件的引线架的剖面图；
图3是本发明一实施例的密封式半导体器件的剖面图；
图4至图6分别是根据本发明一实施例制造密封式半导体器件的方法中各步引线架的透视图和平面图。
图7是根据本发明一实施例制造密封式半导体器件的方法，放入模具内的引线架剖面图；
图8是当图7所示之模具处于挤压状态时，引线架和绝缘条的剖面图；
图9是图4～图8所示之制造方法制得的密封式半导体器件的剖面图；
图10是图9所示之器件的引线经整形后得到的密封式半导体器件的剖面图；
图11是电学测试状态下密封式半导体器件的剖面图；
图12是操作状态下密封式半导体器件的剖面图；
图13是根据本发明另一实施例的密封式半导体器件的剖面图；以及
图14是根据本发明又一实施例的密封式半导体器件的剖面图。
图3是由模制树脂包封的QFP型密封式半导体器件(下文为简便称QFP)的剖面图，它是本发明的一实施例。模制封装2，例如由环氧树脂制成的具有两个互相对置的主表面S1和S2，以及凸缘状侧表面S3，将管芯衬垫3、半导体芯片4，如由单晶硅制成，以及各个细长引线5的内引线部分(第一部分)包封于其内。借助于如一环氧树脂制成的粘结剂，使半导体芯片4粘到管芯衬垫3上。通过由Au、Cu和Al制成的焊丝，线5的内引线部分L1与半导体芯片4电连接。模制封装2的凸缘状侧表面部位S3具有毗连主表面S1的第一侧表面部位S31、毗连主表面S2的侧表面部位S32，以及与其相连的台阶部位SS。
电绝缘条7被放置在引线5的中间部分Li(内引线部分L1和外引线部分即第二部分L2之间的部位)的上表面与模制封装2之间，露到封装2外部的电绝缘填料或填充物7分布在外引线部分L2的那些与引线5中间部分毗连的部分之间。该条7是由薄带状的绝缘材料如聚酰亚胺树脂制成的，并借助于粘结剂粘到引线5的上表面。填料或填充物7’是由与条7相同的材料制成。引线5中间部分Li的下表面未被封装2覆盖。
如图3所示，在本实施例的QFP1中，模压封装2的外尺寸在引线5的上侧和下侧是不同的。更具体地讲，在该封装2中，施加了绝缘条7的引线5上侧的外尺寸大于引线下侧的外尺寸。即，第一侧表面部分S31在第二侧表面部分S32之外。
QFP 1可由下述方法制造。
首先，制备图4所示的引线架8。该引线架8包括管芯衬垫3、设置在管芯衬垫3的各角支撑衬垫的支撑引线9、排列在管芯衬垫3四周的多个细长引线5、条状部件70，如近似于垂直引线长度方向，施加于引线架8的引线5的一表面的矩形框式密封带，以及支撑着引线5和支撑引线9的外框架10。引线架8由金属如铝合金或铜制成，经冲压或腐蚀，使各部件如管芯衬垫3、引线5、支撑引线9、外框架10等整个地形成。
作为一实施例，引线架8约0.1mm厚，引线2的内引线部分约0.13mm宽，而内引线部分的排列间距约0.3mm。另一方面，密封带70约50μm厚、约0.5～2.0mm宽、而使密封带70粘到引线5的粘结层约25μm厚。
随后，如图5所示，将半导体芯片4焊到引线架8的管芯衬垫3上(球焊)，然后如图6所示，通过焊丝6，使引线5与半导体芯片4电连接。
接着，如图7所示，使引线架8装配到模具中。该模具包括一对凹模，即上凹模11a和下凹模11b，使引线架中放置在下凹模11b的上表面上。此时，引线5上表面施加密封带应按这样的位置关系，使密封带与模具的模制线ML相交。
如图7所示，决定模具内腔尺寸的上凹模11a和下凹模11b的凹进面积相互不同。更具体的讲，模具的一个面向引线架8的施加密封带70的表面的凹模，即图中上凹模11a的凹进面积尺寸(a)大于下凹模的相应尺寸(b)。模具内腔的尺寸代表近似垂直于模具凹模挤压运动方向测得的内腔尺寸。
然后，如图8所示，使上凹模11a的下表面与下凹模11b的上表面紧密接触，以备挤压操作。然后，粘到引线架8的引线5上表面的在模制线ML外侧的密封带70部分是介于上凹模11a与待挤压的引线架8的引线5之间，以便将它推入相邻引线5之间的空间，形成密封塞即填料或填充物7’(图3)。反之，模制线ML内侧的密封带70部分，作为绝缘条7保留在引线5的上表面。
在此次挤压时，被带70覆盖的引线5那部分下表面受下模11b的挤压，而其上表面经由软带70受上模11a挤压。此时，因上模11a侧壁内端部与下模11b侧壁内端之间，即在两凹模的不同的凹进面积之间存在位置偏差或位移，所以使引线5的内引线部分L1表示未向下弯曲。若这种位移(X)尺寸至少为0.2mm～0.3mm，在采用上述数值的情况下则证实可制出不会弯曲的引线5。
然后，使模制材料(软化的树脂)注入模具的内腔，模制半导体芯片4。此时因模制线ML外侧的各引线5之间的空间已被一部分密封带70填充，形成密封塞，即填料填充物7’(图3)，软化的树脂不能通过这些空间流到模具的外边。
此后，当从模具中取出引线架8时，由于模具的上凹模11a和下凹模11b的凹陷面积不同，可得到具有引线5上侧和下侧不同外尺寸，即如图9所示的在其侧表面有凸缘的封装2。引线5的第二部分(外引线部分)从侧面S3的台阶部位SS伸出。另一方面，位于第一部分(内引线部分)L1和第二部分L2的中间部分Li的上表面和侧面为绝缘条7和模制材料2所覆盖，而其下表面则是裸露的。
接着，使引线5的外引线部分L2经过焊料镀敷处理之后，用冲压机或类似机械切去引线架8的无用部分。再使引线5弯曲(整形)成预定形状而完成图3所示的QFP 1。在使外引线部分的弯曲方向相反的情况下，可得到图10所示的QFP 1。
如上所述，根据本实施例，因在用模具挤压引线架8时，可防止施加了条状部件70，如密封带的内引线的弯曲，则能高成品产率制作高可靠的QFP 1。
虽然在本实施例中采用了条状部件70施加在其上表面的引线架8，采用在引线架8的下表施加条状部件70的情况下，模制也是有效的，通过使用上模内的侧表面的一端的尺寸(a)小于下模相应尺寸(b)的模具，也可防止引线5的内引线部分朝着施加条状部件表面的相反方向(向上)弯曲。还有，施加了条状部件70的引线表面不必是焊接半导体芯片4的引线表面，根据使用场合，也可使条状部件70施加到不焊接芯片4的引线表面。
另外，因QFP 1在模制封装2的上半部和下半部具有不同的外尺寸，例如使测试仪的探头12与连接侧表面部分S31和S32的台阶部分SS上的相关引线5接触，可实施电学测试，如图11所示。按此方式，因为探头无须与易变形的引线5的末端接触。虽然图11表示引线整形后的的QFP，但很清楚，对在引线整形之前实施电学测试的情况，也可获得同样效果。
再有，当用如图12所示的夹具13操纵QFP 1时，因为用夹具13容易抓住模制封装2有凸缘侧表面的较窄(第二)侧表面部分S32，可更方便地实施QFP的操纵和传递。
此外，在使引线5弯成丁形的情况下，如果，它们是按图13所示弯曲，面向封装2有凸缘侧表面的内(第二)侧表面部分S32，由于与它们往相反方向弯曲相比，可以减少引线5沿横向伸出量，也就可以缩小安装QFP 1所需的面积。
还有，如图14所示，因借助于将散热器14安装到固定在印刷板上的封装上表面上，可使半导体产生的热经过封装衬垫3传导给散热器14，则可以提供热阻小的QFP 1。
虽然，根据几个最佳实施例，对本发明者完成的发明做了如上的具体解释，但是本发明不限于此，很明显在不脱离本发明的范畴仍可进行各式各样的修改。
虽然，在上述实施例中，从将发明应用于QFP的制造过程对本发明做了解释，但是本发明也能适用于各种类型的用带密封方法，安装在引线架上的LSI封装。

Claims (8)

1.一种制造密封式半导体器件的方法，包括下列步骤：
制备一具有电绝缘条状部件的引线架，所说的引线架具有多根引线，每根引线具有用模制部件密封的内引线部分和从所说的模制部件突出的外引线部分，所说的内引线部分具有第一端，用于提供一个与半导体芯片电连接的区域，在所说的内引线和外引线部分之间的边界线的附近，所述引线是彼此不连续的；所说电绝缘条状部件粘接到所说引线的一个表面，并沿着所说内引线部分和外引线部分的所说边界线延伸；
通过导线键合，电连接所说半导体芯片与所说内引线部分的所说第一端，所说引线的所说第一端与所说半导体芯片空间上彼此分开；
放置具有所说电绝缘部件的所说引线架和所说半导体芯片于具有一上凹模和一下凹模的一模具内，所说的上凹模和下凹模具有彼此互不相同的凹进面积，并确定所说模具的一内腔的尺寸，所说的内腔所说尺寸是沿着大致垂直于所说的凹模挤压移动方向测量的，这样设置具有所说电绝缘条状部件的所说引线架和所说半导体芯片，即当所述模具闭合时，与所说电绝缘条状部件相粘接的各所说引线的所说的一个表面与具有较大凹进面积的所说上和下模具的一个相接触，并且与所说一个表面相对的所说引线的另一表面与具有一较小凹进面积的另一所说上和下模具相接触，并且所说上和下模具的所说一个的内边缘相交于所说的电绝缘条状部件；
使所说的模具合拢，挤压所说引线架，并在相邻引线之间的空间插入所说电绝缘条状部件部分；以及
注入模制材料至所说模具的所说内腔中，以形成密封所说半导体芯片和所说引线的所说内引线部分的所说模制部件。
2.一种制造根据权利要求1的密封式半导体器件的方法，其中所说模制线相应于具有所说较大凹进面积的所说上凹模和下凹模一个的内边缘。
3.一种制造根据权利要求1的密封式半导体器件的方法，其中所说的电绝缘条状部件部分插入用作密封的所说的相邻引线之间的所说的空间，以防止所说的模制材料通过所说相邻引线的空间从所说内腔伸出。
4.一种根据权利要求1的制造密封式半导体器件的方法，其中所说引线架还包括由所说引线包围并分开的一芯片封装部分，其中所说方法进一步包括在所说引线架的所说芯片封装部分封装所说半导体芯片。
5.一种密封式半导体器件，包括；
一半导体芯片；
多个具有第一第二主表面并与所说的半导体芯片电连接的细长引线，每个所说的引线均包括第一部分、第二部分以及位于两者之间的中间部分；
一包封所说的半导体芯片和所说的各引线第一部分的模制封装，所说的封装具有两个相对的主表面和一个凸缘状的侧表面，所说的侧表面包括：从所说的封装所说主表面之一延续伸出的第一侧表面部分，从所说封装的另一所说的主表面延续伸出的第二侧表面部分，以及连接所说第一和第二侧表面部分的台阶，其中所说的第一侧表面部分位于所说的第二侧表面部分之外侧，形成所说的台阶，在所说的侧表面所说的台阶处，从所说的模制封装的所说侧表面伸出各所说引线的所说第二部分；
一设置在所说的凸缘状侧表面的所说的台阶与所说的引线的所说中间部分的第一主表面之间的电绝缘条，所说的引线的所说中间部分的第二主表面未被所说的模制封装覆盖；以及
一设置在所说的引线的所说的第二部分的与所说的引线的所说的中间部分的外侧毗连的那些部分之间的电绝缘填充物，所说的电绝缘填充物是由与所说的电绝缘条相同的材料制成的。
6.一种根据权利要求5的器件，还包括设置在所说的模制封装的所说的主表面之一的散热器。
7.一种根据权利要求5的器件，其中所说的各引线的所说的第二部分被弯成向着所说的凸缘状侧表面第二侧表面部分的丁形。
8.一种根据权利要求5的器件，其中所说的模制封装是方形扁平封装。
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JPH02280360A (ja) * 1989-04-20 1990-11-16 Mitsubishi Electric Corp 半導体パッケージ

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EP0657922B1 (en) 1999-08-04
EP0657922A1 (en) 1995-06-14
KR950021459A (ko) 1995-07-26
DE69419881T2 (de) 2000-03-16
JPH07161876A (ja) 1995-06-23
DE69419881D1 (de) 1999-09-09
SG55074A1 (en) 1998-12-21
TW268143B (zh) 1996-01-11
JP3151346B2 (ja) 2001-04-03
US5885852A (en) 1999-03-23
CN1107256A (zh) 1995-08-23

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