JP2022504574A5 - - Google Patents

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Publication number
JP2022504574A5
JP2022504574A5 JP2021519654A JP2021519654A JP2022504574A5 JP 2022504574 A5 JP2022504574 A5 JP 2022504574A5 JP 2021519654 A JP2021519654 A JP 2021519654A JP 2021519654 A JP2021519654 A JP 2021519654A JP 2022504574 A5 JP2022504574 A5 JP 2022504574A5
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JP
Japan
Prior art keywords
metal
layer
concave feature
field region
substrate
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JP2021519654A
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English (en)
Japanese (ja)
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JP7406684B2 (ja
JP2022504574A (ja
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Priority claimed from PCT/US2019/055676 external-priority patent/WO2020077112A1/en
Publication of JP2022504574A publication Critical patent/JP2022504574A/ja
Publication of JP2022504574A5 publication Critical patent/JP2022504574A5/ja
Application granted granted Critical
Publication of JP7406684B2 publication Critical patent/JP7406684B2/ja
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JP2021519654A 2018-10-10 2019-10-10 半導体デバイス内の凹状特徴部を低抵抗率金属で充填する方法 Active JP7406684B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201862744038P 2018-10-10 2018-10-10
US62/744,038 2018-10-10
PCT/US2019/055676 WO2020077112A1 (en) 2018-10-10 2019-10-10 Method for filling recessed features in semiconductor devices with a low-resistivity metal

Publications (3)

Publication Number Publication Date
JP2022504574A JP2022504574A (ja) 2022-01-13
JP2022504574A5 true JP2022504574A5 (enExample) 2022-10-19
JP7406684B2 JP7406684B2 (ja) 2023-12-28

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ID=70160709

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Application Number Title Priority Date Filing Date
JP2021519654A Active JP7406684B2 (ja) 2018-10-10 2019-10-10 半導体デバイス内の凹状特徴部を低抵抗率金属で充填する方法

Country Status (6)

Country Link
US (2) US11024535B2 (enExample)
JP (1) JP7406684B2 (enExample)
KR (1) KR102759932B1 (enExample)
CN (1) CN112805818B (enExample)
TW (1) TWI835883B (enExample)
WO (1) WO2020077112A1 (enExample)

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CN112805818B (zh) 2018-10-10 2024-10-18 东京毅力科创株式会社 用低电阻率金属填充半导体器件中的凹陷特征的方法
US11823896B2 (en) * 2019-02-22 2023-11-21 Taiwan Semiconductor Manufacturing Co., Ltd. Conductive structure formed by cyclic chemical vapor deposition
US12507408B2 (en) 2020-03-12 2025-12-23 Tokyo Electron Limited Method and structures to reduce resistivity in three-dimensional structures for microelectronic workpieces using material deposited in recesses at edges of holes in a multilayer stack
WO2022098517A1 (en) * 2020-11-03 2022-05-12 Tokyo Electron Limited Method for filling recessed features in semiconductor devices with a low-resistivity metal
WO2022169567A1 (en) * 2021-02-05 2022-08-11 Tokyo Electron Limited Removal of stray ruthenium metal nuclei for selective ruthenium metal layer formation
KR20230156342A (ko) * 2021-03-16 2023-11-14 도쿄엘렉트론가부시키가이샤 반도체 디바이스의 함입형 형상부를 저-저항률 금속으로 충전하기 위한 방법
JP2024523510A (ja) 2021-07-06 2024-06-28 東京エレクトロン株式会社 自己組織化単分子層を使用する選択的な膜形成
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