JP2022142230A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2022142230A JP2022142230A JP2021042330A JP2021042330A JP2022142230A JP 2022142230 A JP2022142230 A JP 2022142230A JP 2021042330 A JP2021042330 A JP 2021042330A JP 2021042330 A JP2021042330 A JP 2021042330A JP 2022142230 A JP2022142230 A JP 2022142230A
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- groove
- groove portion
- die pad
- unevenness
- semiconductor device
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 31
- 239000011347 resin Substances 0.000 claims abstract description 28
- 229920005989 resin Polymers 0.000 claims abstract description 28
- 238000000034 method Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000004873 anchoring Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000000275 quality assurance Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49517—Additional leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
図2(a)は第1実施形態の溝50の模式上面図であり、図2(b)は図2(a)におけるA-A線に沿った断面図であり、図2(c)は図2(a)におけるB-B線に沿った断面図である。図2(b)及び(c)においても、図1と同様に樹脂部材40を2点鎖線で表す。
図6(a)は第2実施形態の溝50の模式上面図であり、図6(b)は図6(a)におけるC-C線に沿った断面図であり、図6(c)は図6(a)におけるD-D線に沿った断面図である。図6(b)及び(c)においても、図1と同様に樹脂部材40を2点鎖線で表す。
Claims (6)
- ダイパッドと、前記ダイパッドから延びる端子と、前記ダイパッドの上面に設けられた溝とを有するフレームと、
前記ダイパッドの前記上面における前記溝に重ならない領域に配置された半導体素子と、
前記半導体素子を覆うとともに、前記溝内に設けられた樹脂部材と、を備え、
前記溝は、底面と、前記底面に設けられた第1凹凸とを有する半導体装置。 - 前記溝は、第1方向に延びる第1溝部と、前記第1方向と直交する第2方向における幅が前記第1溝部よりも広く、前記第1方向において前記第1溝部に連続する第2溝部とを有し、
前記第2溝部の底面に前記第1凹凸が設けられている請求項1に記載の半導体装置。 - 前記第1溝部と前記第2溝部との境界に、第2凹凸が設けられている請求項2に記載の半導体装置。
- 前記第2溝部の深さは、前記第1溝部の深さよりも深い請求項2または3に記載の半導体装置。
- 前記第2溝部は、前記第1溝部の前記第1方向の端に位置する請求項2~4のいずれか1つに記載の半導体装置。
- 前記第2溝部は、前記第1溝部の前記第1方向における中央部に位置する請求項2~5のいずれか1つに記載の半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2021042330A JP7474213B2 (ja) | 2021-03-16 | 2021-03-16 | 半導体装置 |
CN202110646522.9A CN115084072A (zh) | 2021-03-16 | 2021-06-10 | 半导体装置 |
US17/410,508 US20220301983A1 (en) | 2021-03-16 | 2021-08-24 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2021042330A JP7474213B2 (ja) | 2021-03-16 | 2021-03-16 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2022142230A true JP2022142230A (ja) | 2022-09-30 |
JP7474213B2 JP7474213B2 (ja) | 2024-04-24 |
Family
ID=83246410
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2021042330A Active JP7474213B2 (ja) | 2021-03-16 | 2021-03-16 | 半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20220301983A1 (ja) |
JP (1) | JP7474213B2 (ja) |
CN (1) | CN115084072A (ja) |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010062365A (ja) * | 2008-09-04 | 2010-03-18 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP5216735B2 (ja) | 2009-09-30 | 2013-06-19 | 新電元工業株式会社 | 半導体パッケージ |
JP5878054B2 (ja) * | 2012-03-27 | 2016-03-08 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法及び半導体装置 |
JP2014007363A (ja) * | 2012-06-27 | 2014-01-16 | Renesas Electronics Corp | 半導体装置の製造方法および半導体装置 |
JP2014116499A (ja) | 2012-12-11 | 2014-06-26 | Mitsui High Tec Inc | リードフレーム及びその製造方法 |
JP2014123614A (ja) | 2012-12-20 | 2014-07-03 | Mitsui High Tec Inc | リードフレーム及びその製造方法 |
CN107924884B (zh) | 2016-03-30 | 2022-02-18 | 松下知识产权经营株式会社 | 半导体装置 |
JP6776800B2 (ja) | 2016-10-18 | 2020-10-28 | 株式会社デンソー | 電子装置及びその製造方法 |
CN109891575B (zh) * | 2016-10-18 | 2023-07-14 | 株式会社电装 | 电子装置及其制造方法 |
JP6636978B2 (ja) | 2017-03-24 | 2020-01-29 | 株式会社東芝 | 半導体装置及びその製造方法 |
-
2021
- 2021-03-16 JP JP2021042330A patent/JP7474213B2/ja active Active
- 2021-06-10 CN CN202110646522.9A patent/CN115084072A/zh active Pending
- 2021-08-24 US US17/410,508 patent/US20220301983A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
JP7474213B2 (ja) | 2024-04-24 |
CN115084072A (zh) | 2022-09-20 |
US20220301983A1 (en) | 2022-09-22 |
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