JP2021093434A5 - - Google Patents

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Publication number
JP2021093434A5
JP2021093434A5 JP2019222680A JP2019222680A JP2021093434A5 JP 2021093434 A5 JP2021093434 A5 JP 2021093434A5 JP 2019222680 A JP2019222680 A JP 2019222680A JP 2019222680 A JP2019222680 A JP 2019222680A JP 2021093434 A5 JP2021093434 A5 JP 2021093434A5
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JP
Japan
Prior art keywords
wiring
resist
seed film
forming
thickness direction
Prior art date
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JP2019222680A
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English (en)
Japanese (ja)
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JP7019657B2 (ja
JP2021093434A (ja
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Priority claimed from JP2019222680A external-priority patent/JP7019657B2/ja
Priority to JP2019222680A priority Critical patent/JP7019657B2/ja
Priority to KR1020227018620A priority patent/KR102901557B1/ko
Priority to CN202080085687.7A priority patent/CN114788423A/zh
Priority to US17/783,206 priority patent/US20230007783A1/en
Priority to PCT/JP2020/044169 priority patent/WO2021117501A1/ja
Priority to TW109142601A priority patent/TWI886182B/zh
Publication of JP2021093434A publication Critical patent/JP2021093434A/ja
Publication of JP2021093434A5 publication Critical patent/JP2021093434A5/ja
Priority to JP2021203306A priority patent/JP7203939B2/ja
Publication of JP7019657B2 publication Critical patent/JP7019657B2/ja
Application granted granted Critical
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2019222680A 2019-12-10 2019-12-10 配線回路基板の製造方法 Active JP7019657B2 (ja)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP2019222680A JP7019657B2 (ja) 2019-12-10 2019-12-10 配線回路基板の製造方法
PCT/JP2020/044169 WO2021117501A1 (ja) 2019-12-10 2020-11-27 配線回路基板の製造方法
CN202080085687.7A CN114788423A (zh) 2019-12-10 2020-11-27 布线电路基板的制造方法
US17/783,206 US20230007783A1 (en) 2019-12-10 2020-11-27 Method for producing wiring circuit board
KR1020227018620A KR102901557B1 (ko) 2019-12-10 2020-11-27 배선 회로 기판의 제조 방법
TW109142601A TWI886182B (zh) 2019-12-10 2020-12-03 配線電路基板之製造方法
JP2021203306A JP7203939B2 (ja) 2019-12-10 2021-12-15 配線回路基板の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019222680A JP7019657B2 (ja) 2019-12-10 2019-12-10 配線回路基板の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2021203306A Division JP7203939B2 (ja) 2019-12-10 2021-12-15 配線回路基板の製造方法

Publications (3)

Publication Number Publication Date
JP2021093434A JP2021093434A (ja) 2021-06-17
JP2021093434A5 true JP2021093434A5 (enExample) 2021-09-16
JP7019657B2 JP7019657B2 (ja) 2022-02-15

Family

ID=76312732

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2019222680A Active JP7019657B2 (ja) 2019-12-10 2019-12-10 配線回路基板の製造方法

Country Status (5)

Country Link
US (1) US20230007783A1 (enExample)
JP (1) JP7019657B2 (enExample)
CN (1) CN114788423A (enExample)
TW (1) TWI886182B (enExample)
WO (1) WO2021117501A1 (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7387453B2 (ja) * 2020-01-10 2023-11-28 住友電気工業株式会社 フレキシブルプリント配線板及びその製造方法
US12016130B2 (en) * 2021-05-26 2024-06-18 Samsung Electro-Mechanics Co., Ltd. Method of manufacturing printed circuit board
JP2022185674A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185678A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185671A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185667A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185669A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185675A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185677A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185672A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185670A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185673A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185676A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
JP2022185679A (ja) * 2021-06-03 2022-12-15 株式会社三洋物産 遊技機
US20250151208A1 (en) * 2023-11-06 2025-05-08 Dell Products L.P. Systems and methods for optimizing metal weight of conductive layers of circuit board

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4159222A (en) * 1977-01-11 1979-06-26 Pactel Corporation Method of manufacturing high density fine line printed circuitry
JPH0832244A (ja) * 1994-07-12 1996-02-02 Toshiba Corp 多層配線基板
JP2806370B2 (ja) * 1996-07-16 1998-09-30 日本電気株式会社 パターン形成方法
JP2001007456A (ja) * 1999-06-17 2001-01-12 Toshiba Corp 配線回路基板
JP2002111174A (ja) * 2000-09-27 2002-04-12 Nitto Denko Corp 配線回路基板の製造方法
JP4034772B2 (ja) * 2004-09-16 2008-01-16 Ｔｄｋ株式会社 多層基板及びその製造方法
JP5136311B2 (ja) * 2008-09-11 2013-02-06 大日本印刷株式会社 サスペンション用基板
JP2010171170A (ja) * 2009-01-22 2010-08-05 Hitachi Cable Ltd 銅回路配線基板およびその製造方法
JP5010669B2 (ja) * 2009-12-07 2012-08-29 パナソニック株式会社 配線基板及びその製造方法
JP2016186986A (ja) * 2015-03-27 2016-10-27 株式会社フジクラ プリント配線板及びプリント配線板の製造方法
US9653406B2 (en) * 2015-04-16 2017-05-16 Taiwan Semiconductor Manufacturing Company, Ltd. Conductive traces in semiconductor devices and methods of forming same
US11353443B2 (en) * 2015-07-14 2022-06-07 Conocophillips Company Enhanced recovery response prediction
US10115668B2 (en) * 2015-12-15 2018-10-30 Intel IP Corporation Semiconductor package having a variable redistribution layer thickness
JP6778585B2 (ja) * 2016-11-02 2020-11-04 日東電工株式会社 配線回路基板およびその製造方法
JP2018157051A (ja) * 2017-03-17 2018-10-04 三菱マテリアル株式会社 バンプ付き配線基板の製造方法
JP6810908B2 (ja) * 2017-03-31 2021-01-13 大日本印刷株式会社 導電基板およびその製造方法
JP7085328B2 (ja) * 2017-09-29 2022-06-16 日東電工株式会社 配線回路基板、その製造方法および撮像装置

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