JP2020520120A - 高品質のボイド充填法のための流動性堆積及び高密度プラズマ処理工程サイクル - Google Patents
高品質のボイド充填法のための流動性堆積及び高密度プラズマ処理工程サイクル Download PDFInfo
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- JP2020520120A JP2020520120A JP2019562616A JP2019562616A JP2020520120A JP 2020520120 A JP2020520120 A JP 2020520120A JP 2019562616 A JP2019562616 A JP 2019562616A JP 2019562616 A JP2019562616 A JP 2019562616A JP 2020520120 A JP2020520120 A JP 2020520120A
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- curing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
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- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/36—Carbonitrides
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- C—CHEMISTRY; METALLURGY
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
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- C23C16/40—Oxides
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- C23C16/402—Silicon dioxide
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Abstract
Description
Claims (15)
- 基板を処理する方法であって、
規定の堆積厚さに達するまで、シリコン含有誘電体層である流動性層をトレンチの底面及び側壁面の上にボトムアップで形成するために、少なくとも1つのトレンチを有する基板に堆積処理を行うことと、
前記流動性層に、UV硬化処理である第1の硬化処理を行うことと、
次いで、UV硬化された前記流動性層に、プラズマ処理又はプラズマ支援処理である第2の硬化処理を行うことと、
プラズマ硬化された前記流動性層が、前記トレンチに充填され、前記トレンチの上面を超える規定の高さに達するまで、前記堆積処理と前記第1の硬化処理と前記第2の硬化処理とを連続的に繰り返し実施することと
を含む方法。 - 前記第1の硬化処理が、酸素、窒素、又は不活性ガスを含むラジカル系雰囲気下で実施される、請求項1に記載の方法。
- 前記第2の硬化処理が、酸素/ヘリウム雰囲気、酸素/アルゴン雰囲気、又は酸素/水素雰囲気下で実施される、請求項1に記載の方法。
- 前記第2の硬化処理が、ラジカル系雰囲気下で実施される、請求項3に記載の方法。
- 前記流動性層が、約5オングストローム/秒以下の堆積速度で堆積される、請求項1に記載の方法。
- 基板を処理する方法であって、
シリコン含有前駆体を酸素系ラジカル前駆体と窒素系ラジカル前駆体とに反応させて、基板のトレンチ内に流動性層を形成することによって、堆積処理を実施することと、
プラズマチャンバで前記流動性層を硬化させることであって、第2の処理チャンバが酸素含有雰囲気又は窒素含有雰囲気を有する、前記流動性層を硬化させることと、
硬化された前記流動性層が、前記トレンチに充填され、前記トレンチの上面を超える規定の高さに達するまで、前記堆積処理と前記硬化処理とを連続的に繰り返し実施することと
を含む方法。 - 前記流動性層が、SiC、SiO、SiCN、SiO2、SiOC、SiOCN、SiON、又はSiNである、請求項6に記載の方法。
- 前記シリコン含有前駆体が、シロキサン化合物、又は一若しくは複数のハロゲン部分を含むハロゲン化されたシロキサン化合物を含む、請求項6に記載の方法。
- 前記流動性層を硬化させることが更に、
酸素/ヘリウム雰囲気、酸素/アルゴン雰囲気、又は酸素/水素雰囲気下で前記流動性層にイオンを衝突させることと、
不活性ガス雰囲気下で前記流動性層にイオンを衝突させることと
を含む、請求項6に記載の方法。 - 前記流動性層を硬化させることは、誘導結合プラズマ(ICP)チャンバで実施される、請求項9に記載の方法。
- 前記流動性層を硬化させることは更に、
約5mTorr以下のチャンバ圧力において前記基板にバイアス電力を印加すること
を含む、請求項9に記載の方法。 - 前記堆積処理を実施した後、且つ前記流動性層を硬化させる前に、酸素含有雰囲気、窒素含有雰囲気、又は不活性ガス雰囲気下でUVエネルギーを用いて前記流動性層を硬化させること
を更に含む、請求項6に記載の方法。 - UVエネルギーを用いて前記流動性層を硬化させることが、ラジカル系雰囲気下で実施される、請求項12に記載の方法。
- 基板を処理するためのクラスタツールであって、
ロードロックチャンバと、
前記ロードロックチャンバの第1の側面に連結された移送チャンバと、
前記移送チャンバに連結された複数の第1の処理チャンバであって、各々が流動性層の堆積を実施することができる堆積チャンバである、複数の第1の処理チャンバと、
前記移送チャンバに連結された複数の第2の処理チャンバであって、各々が熱硬化処理を実施することができる硬化チャンバであり、UV光硬化チャンバ、熱硬化チャンバ、マイクロ波硬化チャンバ、プラズマ硬化チャンバ、電子ビーム硬化チャンバ、及び中性ビーム硬化チャンバから構成される群から選択される、複数の第2の処理チャンバと、
前記移送チャンバに連結された複数の第3の処理チャンバであって、各々がプラズマ硬化処理を実施することができるプラズマチャンバであり、そのうちの少なくとも1つが誘導結合プラズマ(ICP)チャンバ、又は容量結合プラズマ(CCP)チャンバである、複数の第3の処理チャンバと、
ロードチャンバの第2の側面に連結されたファクトリインターフェースと
備える、クラスタツール。 - 前記第1の処理チャンバが高密度プラズマCVDチャンバであり、前記第2の処理チャンバがUV光硬化チャンバであり、前記第3の処理チャンバが誘導結合プラズマ(ICP)チャンバである、請求項14に記載のクラスタツール。
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TWI721270B (zh) | 2021-03-11 |
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