JP2020064992A - 半導体装置及び半導体装置の製造方法 - Google Patents
半導体装置及び半導体装置の製造方法 Download PDFInfo
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Abstract
Description
また、本発明の一観点によれば、上記の半導体装置の製造方法が提供される。
以下、図面を参照して、第1の実施の形態の半導体装置について、図1及び図2を用いて説明する。図1及び図2は、第1の実施の形態の半導体装置を説明するための図である。なお、図1及び図2は、それぞれ半導体装置の電極パッド近傍の断面拡大図である。特に、図1(B)及び図2(B)は、半導体装置の電極パッドに対するボンディングワイヤの超音波接合をそれぞれ示している。
[ステップS2] 回路基板5または筐体7のいずれかに凹部4c,7cをそれぞれ形成する。例えば、図4(A)に示されるように、回路基板5において、電極パッド2aの直下に対応する絶縁層4の裏面の第1領域4bに凹部4cを形成する。また、図5(A)に示されるように、筐体7において、回路基板5が配置される配置領域7aの、電極パッド2aの直下に対応する予定の第2領域7bに凹部7cを形成する。凹部4c,7cはエッチングや機械加工等により形成することができる。回路基板5では、絶縁層4の裏面に凹部4cを除いてレジスト樹脂等を積層することで、凹部4cを形成してもよい。また、ステップS1で、予め凹部4cが成形加工された回路基板5を用意しておいてもよい。筐体7では、ステップS1で、予め凹部7cが形成されるように成形された筐体7を用意しておいてもよい。
以上の工程後、例えば、筐体7内の回路基板5及びボンディングワイヤ8等を封止部材により封止する等、必要な製造工程を行って、半導体装置1a,1bを製造する。
第2の実施の形態では、第1の実施の形態において回路基板5の裏面に凹部4cを形成した半導体装置1aについて具体的に図6〜図8を用いて説明する。図6は、第2の実施の形態の半導体装置の平面図であり、図7は、第2の実施の形態の半導体装置の断面図である。図8は、第2の実施の形態の半導体装置に含まれるプリント基板の平面図である。なお、図6〜図8では、複数存在する構成においては、少なくとも1つに同じ符号を付している。図7は、図6における一点鎖線X−Xにおける断面図である。図8は、プリント基板30の裏面に形成された溝部34の形成位置を破線で示している。なお、図6〜図8において、おもて面とは、図6及び図8で表示されている側、図7中上側であり、裏面とは、図6及び図8で表示されていない側、図7中下側である。
第3の実施の形態では、第2の実施の形態の半導体装置10において溝部をプリント基板30の裏面ではなく、ケース40の配置領域44に形成する場合を例に挙げて図10及び図11を用いて説明する。なお、第3の実施の形態でも、第2の実施の形態の半導体装置10と同じ構成には同じ符号を付し、それらの説明の詳細については省略する。
2 導電パターン
2a 電極パッド
2b ボンディング領域
3 レジスト
4 絶縁層
4b 第1領域
4c,7c 凹部
5 回路基板
6 接合材
7 筐体
7a,44 配置領域
7b 第2領域
8,50 ボンディングワイヤ
9 ボンディングツール
20 セラミック回路基板
21 絶縁板
22 金属板
23a〜23d 回路パターン
24 スイッチング素子
25 ダイオード素子
30,30a プリント基板
31 制御IC
32 電子部品
33 電極パッド
34,34a,46 溝部
40,40a ケース
41 側壁部
42 主端子
43 制御端子
45 開口部
51 接着剤
Claims (7)
- 電極パッドと前記電極パッドがおもて面に形成された絶縁層とを有する回路基板と、
前記回路基板が配置される配置領域を備えて、前記回路基板を収納する筐体と、
を有し、
前記電極パッドの直下に対応する前記絶縁層の裏面の第1領域、または配置された前記回路基板の前記第1領域に対向する前記配置領域の第2領域に、接合材が埋設される凹部が形成されている、
半導体装置。 - 前記凹部を含む溝部が形成されている、
請求項1に記載の半導体装置。 - 前記凹部は、前記電極パッドのボンディング領域の直下に対応する、前記絶縁層の裏面または前記筐体の前記配置領域に形成されている、
請求項1または2に記載の半導体装置。 - 前記凹部の幅は、前記ボンディング領域の幅の0.8倍以上、1.2倍以下である、
請求項3に記載の半導体装置。 - 前記凹部の断面は、半円状である、
請求項1乃至4のいずれかに記載の半導体装置。 - 電極パッドと前記電極パッドがおもて面に形成された絶縁層とを有する回路基板と、前記回路基板が配置される配置領域を備える筐体とを用意する工程と、
前記電極パッドの直下に対応する前記絶縁層の裏面の第1領域に凹部を形成する工程と、
前記第1領域に形成した前記凹部または前記凹部に対向する領域に接合材を塗布する工程と、
前記筐体の前記配置領域に前記回路基板を接合する工程と、
を有する半導体装置の製造方法。 - 電極パッドと前記電極パッドがおもて面に形成された絶縁層とを有する回路基板と、前記回路基板が配置される配置領域を備える筐体とを用意する工程と、
配置される前記回路基板の前記電極パッドの直下に対応する前記配置領域の第2領域に凹部を形成する工程と、
前記第2領域に形成した前記凹部または前記凹部に対向する領域に接合材を塗布する工程と、
前記筐体の前記配置領域に前記回路基板を接合する工程と、
を有する半導体装置の製造方法。
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