JP2019507505A5 - - Google Patents

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JP2019507505A5
JP2019507505A5 JP2018546013A JP2018546013A JP2019507505A5 JP 2019507505 A5 JP2019507505 A5 JP 2019507505A5 JP 2018546013 A JP2018546013 A JP 2018546013A JP 2018546013 A JP2018546013 A JP 2018546013A JP 2019507505 A5 JP2019507505 A5 JP 2019507505A5
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JP
Japan
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material layer
silicon
substrate
substrate temperature
silicon germanium
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JP2018546013A
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English (en)
Japanese (ja)
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JP2019507505A (ja
JP6827633B2 (ja
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Priority claimed from PCT/US2017/020503 external-priority patent/WO2017151958A1/en
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JP2018546013A 2016-03-02 2017-03-02 等方性シリコン及びシリコンゲルマニウムの調整可能な選択性を備えたエッチング Active JP6827633B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201662302584P 2016-03-02 2016-03-02
US201662302587P 2016-03-02 2016-03-02
US62/302,584 2016-03-02
US62/302,587 2016-03-02
PCT/US2017/020503 WO2017151958A1 (en) 2016-03-02 2017-03-02 Isotropic silicon and silicon-germanium etching with tunable selectivity

Publications (3)

Publication Number Publication Date
JP2019507505A JP2019507505A (ja) 2019-03-14
JP2019507505A5 true JP2019507505A5 (https=) 2020-02-06
JP6827633B2 JP6827633B2 (ja) 2021-02-10

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JP2018546013A Active JP6827633B2 (ja) 2016-03-02 2017-03-02 等方性シリコン及びシリコンゲルマニウムの調整可能な選択性を備えたエッチング

Country Status (5)

Country Link
US (1) US9984890B2 (https=)
JP (1) JP6827633B2 (https=)
KR (1) KR102323389B1 (https=)
TW (1) TWI625785B (https=)
WO (1) WO2017151958A1 (https=)

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US10685887B2 (en) * 2017-12-04 2020-06-16 Tokyo Electron Limited Method for incorporating multiple channel materials in a complimentary field effective transistor (CFET) device
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KR102823628B1 (ko) * 2018-05-08 2025-06-20 램 리써치 코포레이션 텔레센트릭 (tele-centric) 렌즈, 광학 빔 폴딩 어셈블리, 또는 다각형 스캐너를 갖는 렌즈 회로를 포함하는 원자 층 에칭 및 증착 프로세싱 시스템들
JP7072440B2 (ja) * 2018-05-16 2022-05-20 東京エレクトロン株式会社 シリコン含有膜のエッチング方法、コンピュータ記憶媒体、及びシリコン含有膜のエッチング装置
US10923356B2 (en) * 2018-07-20 2021-02-16 Tokyo Electron Limited Gas phase etch with controllable etch selectivity of silicon-germanium alloys
WO2020042254A1 (zh) * 2018-08-28 2020-03-05 中国科学院微电子研究所 一种高精度的刻蚀方法
CN112789710B (zh) * 2018-10-03 2025-03-04 朗姆研究公司 纳米线的选择性蚀刻
WO2020172208A1 (en) * 2019-02-20 2020-08-27 Tokyo Electron Limited Method for selective etching at an interface between materials
US10892158B2 (en) * 2019-04-01 2021-01-12 Hitachi High-Tech Corporation Manufacturing method of a semiconductor device and a plasma processing apparatus
TW202125622A (zh) 2019-08-28 2021-07-01 美商得昇科技股份有限公司 使用氟自由基處理工件的方法
JP7345334B2 (ja) 2019-09-18 2023-09-15 東京エレクトロン株式会社 エッチング方法及び基板処理システム
US12165848B2 (en) 2019-10-29 2024-12-10 Tokyo Electron Limited Substrate processing method, substrate processing apparatus, and method for producing nanowire or nanosheet transistor
JP7653666B2 (ja) * 2020-03-10 2025-03-31 パナソニックIpマネジメント株式会社 電子部品のクリーニング方法および素子チップの製造方法
JP7360979B2 (ja) * 2020-03-19 2023-10-13 東京エレクトロン株式会社 基板処理方法及び基板処理装置
US11424120B2 (en) * 2021-01-22 2022-08-23 Tokyo Electron Limited Plasma etching techniques
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US11538690B2 (en) * 2021-02-09 2022-12-27 Tokyo Electron Limited Plasma etching techniques
JP7771835B2 (ja) * 2021-05-31 2025-11-18 東京エレクトロン株式会社 基板処理方法及び基板処理装置
JP7803047B2 (ja) * 2021-06-15 2026-01-21 東京エレクトロン株式会社 エッチング方法及びエッチング装置
WO2022264380A1 (ja) * 2021-06-17 2022-12-22 株式会社日立ハイテク プラズマ処理方法および半導体装置の製造方法
FR3125915A1 (fr) * 2021-10-07 2023-02-03 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de gravure selective isotrope de silicium
US12272558B2 (en) * 2022-05-09 2025-04-08 Tokyo Electron Limited Selective and isotropic etch of silicon over silicon-germanium alloys and dielectrics; via new chemistry and surface modification
US12261053B2 (en) * 2022-08-10 2025-03-25 Tokyo Electron Limited Substrate processing with selective etching
US12512327B2 (en) 2022-09-15 2025-12-30 Tokyo Electron Limited Surface modification to achieve selective isotropic etch
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