JP2019186319A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2019186319A5 JP2019186319A5 JP2018072937A JP2018072937A JP2019186319A5 JP 2019186319 A5 JP2019186319 A5 JP 2019186319A5 JP 2018072937 A JP2018072937 A JP 2018072937A JP 2018072937 A JP2018072937 A JP 2018072937A JP 2019186319 A5 JP2019186319 A5 JP 2019186319A5
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- insulating layer
- connection terminal
- board according
- exposed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000007423 decrease Effects 0.000 claims description 3
- 238000000034 method Methods 0.000 claims 3
- 239000004065 semiconductor Substances 0.000 claims 3
- 238000004519 manufacturing process Methods 0.000 claims 2
- 238000009413 insulation Methods 0.000 claims 1
- 239000011800 void material Substances 0.000 claims 1
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018072937A JP7386595B2 (ja) | 2018-04-05 | 2018-04-05 | 配線基板、半導体装置及び配線基板の製造方法 |
| US16/354,472 US10790256B2 (en) | 2018-04-05 | 2019-03-15 | Wiring board and semiconductor device |
| TW108109521A TWI771573B (zh) | 2018-04-05 | 2019-03-20 | 配線基板、半導體裝置及配線基板的製造方法 |
| KR1020190034104A KR102742049B1 (ko) | 2018-04-05 | 2019-03-26 | 배선 기판, 반도체 장치 및 배선 기판의 제조 방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018072937A JP7386595B2 (ja) | 2018-04-05 | 2018-04-05 | 配線基板、半導体装置及び配線基板の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2019186319A JP2019186319A (ja) | 2019-10-24 |
| JP2019186319A5 true JP2019186319A5 (enExample) | 2021-03-11 |
| JP7386595B2 JP7386595B2 (ja) | 2023-11-27 |
Family
ID=68096569
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2018072937A Active JP7386595B2 (ja) | 2018-04-05 | 2018-04-05 | 配線基板、半導体装置及び配線基板の製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US10790256B2 (enExample) |
| JP (1) | JP7386595B2 (enExample) |
| KR (1) | KR102742049B1 (enExample) |
| TW (1) | TWI771573B (enExample) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11031342B2 (en) | 2017-11-15 | 2021-06-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor package and method |
| US10950551B2 (en) * | 2019-04-29 | 2021-03-16 | Advanced Semiconductor Engineering, Inc. | Embedded component package structure and manufacturing method thereof |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3865989B2 (ja) * | 2000-01-13 | 2007-01-10 | 新光電気工業株式会社 | 多層配線基板、配線基板、多層配線基板の製造方法、配線基板の製造方法、及び半導体装置 |
| JP5089157B2 (ja) * | 2006-12-15 | 2012-12-05 | 新光電気工業株式会社 | 色素増感型太陽電池モジュールおよびその製造方法 |
| JP5032456B2 (ja) * | 2008-08-12 | 2012-09-26 | 新光電気工業株式会社 | 半導体装置、インターポーザ、及びそれらの製造方法 |
| JP2013110151A (ja) * | 2011-11-17 | 2013-06-06 | Elpida Memory Inc | 半導体チップ及び半導体装置 |
| JP5853896B2 (ja) | 2012-08-03 | 2016-02-09 | 富士通株式会社 | 半導体チップ、半導体装置、および半導体装置の製造方法 |
| TWI528517B (zh) * | 2013-03-26 | 2016-04-01 | 威盛電子股份有限公司 | 線路基板、半導體封裝結構及線路基板製程 |
| KR102472945B1 (ko) * | 2015-04-23 | 2022-12-01 | 삼성전기주식회사 | 인쇄회로기판, 반도체 패키지 및 그 제조방법 |
| JP2017034059A (ja) * | 2015-07-31 | 2017-02-09 | イビデン株式会社 | プリント配線板、半導体パッケージおよびプリント配線板の製造方法 |
| KR102423309B1 (ko) * | 2016-08-25 | 2022-07-21 | 소니 세미컨덕터 솔루션즈 가부시키가이샤 | 반도체 장치, 촬상 장치, 및 반도체 장치의 제조 방법 |
-
2018
- 2018-04-05 JP JP2018072937A patent/JP7386595B2/ja active Active
-
2019
- 2019-03-15 US US16/354,472 patent/US10790256B2/en active Active
- 2019-03-20 TW TW108109521A patent/TWI771573B/zh active
- 2019-03-26 KR KR1020190034104A patent/KR102742049B1/ko active Active