JP2018107349A5 - - Google Patents
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- Publication number
- JP2018107349A5 JP2018107349A5 JP2016254255A JP2016254255A JP2018107349A5 JP 2018107349 A5 JP2018107349 A5 JP 2018107349A5 JP 2016254255 A JP2016254255 A JP 2016254255A JP 2016254255 A JP2016254255 A JP 2016254255A JP 2018107349 A5 JP2018107349 A5 JP 2018107349A5
- Authority
- JP
- Japan
- Prior art keywords
- pad
- diameter
- insulating layer
- via portion
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims description 6
- 230000007423 decrease Effects 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 4
- 230000003247 decreasing effect Effects 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 230000000149 penetrating effect Effects 0.000 claims description 2
- 239000010979 ruby Substances 0.000 claims description 2
- 229910001750 ruby Inorganic materials 0.000 claims description 2
- 238000000034 method Methods 0.000 claims 2
- 230000002093 peripheral effect Effects 0.000 claims 1
- 238000007747 plating Methods 0.000 claims 1
- 239000004020 conductor Substances 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016254255A JP6796482B2 (ja) | 2016-12-27 | 2016-12-27 | 配線基板、配線基板の製造方法 |
| US15/845,257 US10306759B2 (en) | 2016-12-27 | 2017-12-18 | Wiring substrate |
| US16/370,010 US10887985B2 (en) | 2016-12-27 | 2019-03-29 | Wiring substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2016254255A JP6796482B2 (ja) | 2016-12-27 | 2016-12-27 | 配線基板、配線基板の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2018107349A JP2018107349A (ja) | 2018-07-05 |
| JP2018107349A5 true JP2018107349A5 (enExample) | 2019-07-11 |
| JP6796482B2 JP6796482B2 (ja) | 2020-12-09 |
Family
ID=62630448
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016254255A Active JP6796482B2 (ja) | 2016-12-27 | 2016-12-27 | 配線基板、配線基板の製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (2) | US10306759B2 (enExample) |
| JP (1) | JP6796482B2 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7240909B2 (ja) * | 2019-03-13 | 2023-03-16 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| US10978417B2 (en) * | 2019-04-29 | 2021-04-13 | Advanced Semiconductor Engineering, Inc. | Wiring structure and method for manufacturing the same |
| KR20210126394A (ko) * | 2020-04-10 | 2021-10-20 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그의 제조 방법 |
| US11227823B2 (en) * | 2020-04-20 | 2022-01-18 | Advanced Semiconductor Engineering, Inc. | Wiring structure |
| CN113811080A (zh) * | 2020-06-16 | 2021-12-17 | 深南电路股份有限公司 | 一种电路板及其制备方法 |
| JP2023111607A (ja) * | 2022-01-31 | 2023-08-10 | イビデン株式会社 | 配線基板 |
| JP7771914B2 (ja) * | 2022-10-14 | 2025-11-18 | 株式会社村田製作所 | インダクタ部品 |
Family Cites Families (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6674017B1 (en) * | 1998-12-24 | 2004-01-06 | Ngk Spark Plug Co., Ltd. | Multilayer-wiring substrate and method for fabricating same |
| JP2006253189A (ja) * | 2005-03-08 | 2006-09-21 | Fujitsu Ltd | 多層回路基板及びその製造方法 |
| DE102005024914A1 (de) * | 2005-05-31 | 2006-12-07 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zum Ausbilden elektrisch leitfähiger Leitungen in einem integrierten Schaltkreis |
| US7886474B2 (en) * | 2008-01-24 | 2011-02-15 | Werner Theodore J | Rest for cleaning a rifle and for sighting a scope, a stock, and a bore of the rifle |
| JP5181702B2 (ja) * | 2008-02-06 | 2013-04-10 | 株式会社村田製作所 | 配線基板の製造方法 |
| JP5223361B2 (ja) * | 2008-02-06 | 2013-06-26 | 株式会社村田製作所 | 配線基板の製造方法 |
| JP5350830B2 (ja) * | 2009-02-16 | 2013-11-27 | 日本特殊陶業株式会社 | 多層配線基板及びその製造方法 |
| WO2010150310A1 (ja) * | 2009-06-24 | 2010-12-29 | 富士通株式会社 | 配線基板の製造方法 |
| JP5537657B2 (ja) * | 2010-06-24 | 2014-07-02 | 富士通株式会社 | 配線構造の形成方法、半導体装置の製造方法、基板処理装置 |
| JP2016035969A (ja) | 2014-08-01 | 2016-03-17 | 味の素株式会社 | 回路基板及びその製造方法 |
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2016
- 2016-12-27 JP JP2016254255A patent/JP6796482B2/ja active Active
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2017
- 2017-12-18 US US15/845,257 patent/US10306759B2/en active Active
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2019
- 2019-03-29 US US16/370,010 patent/US10887985B2/en active Active