JP2019102117A5 - - Google Patents

Download PDF

Info

Publication number
JP2019102117A5
JP2019102117A5 JP2018186436A JP2018186436A JP2019102117A5 JP 2019102117 A5 JP2019102117 A5 JP 2019102117A5 JP 2018186436 A JP2018186436 A JP 2018186436A JP 2018186436 A JP2018186436 A JP 2018186436A JP 2019102117 A5 JP2019102117 A5 JP 2019102117A5
Authority
JP
Japan
Prior art keywords
memory
memory cell
state
read
read voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2018186436A
Other languages
English (en)
Japanese (ja)
Other versions
JP2019102117A (ja
JP7097792B2 (ja
Filing date
Publication date
Priority claimed from KR1020170165843A external-priority patent/KR102401183B1/ko
Application filed filed Critical
Publication of JP2019102117A publication Critical patent/JP2019102117A/ja
Publication of JP2019102117A5 publication Critical patent/JP2019102117A5/ja
Application granted granted Critical
Publication of JP7097792B2 publication Critical patent/JP7097792B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2018186436A 2017-12-05 2018-10-01 メモリ装置及びその動作方法 Active JP7097792B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020170165843A KR102401183B1 (ko) 2017-12-05 2017-12-05 메모리 장치 및 그 동작 방법
KR10-2017-0165843 2017-12-05

Publications (3)

Publication Number Publication Date
JP2019102117A JP2019102117A (ja) 2019-06-24
JP2019102117A5 true JP2019102117A5 (enExample) 2021-09-24
JP7097792B2 JP7097792B2 (ja) 2022-07-08

Family

ID=66548389

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018186436A Active JP7097792B2 (ja) 2017-12-05 2018-10-01 メモリ装置及びその動作方法

Country Status (5)

Country Link
US (1) US10580488B2 (enExample)
JP (1) JP7097792B2 (enExample)
KR (1) KR102401183B1 (enExample)
CN (1) CN109872751B (enExample)
DE (1) DE102018128329A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102427895B1 (ko) * 2018-02-08 2022-08-02 에스케이하이닉스 주식회사 저항 메모리 소자의 읽기 방법
KR102701814B1 (ko) * 2019-02-27 2024-09-03 에스케이하이닉스 주식회사 효율적인 리드 동작을 수행하는 비휘발성 메모리 장치 및 이를 이용하는 시스템
US10867671B1 (en) * 2019-07-02 2020-12-15 Micron Technology, Inc. Techniques for applying multiple voltage pulses to select a memory cell
US10942655B2 (en) * 2019-07-09 2021-03-09 Seagate Technology Llc Mitigating data errors in a storage device
JP2023025932A (ja) * 2021-08-11 2023-02-24 ソニーセミコンダクタソリューションズ株式会社 メモリモジュール
FR3155310A1 (fr) * 2023-11-10 2025-05-16 Commissariat A L'energie Atomique Et Aux Energies Alternatives Estimation de l’état initial d’un élément résistif

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6768665B2 (en) 2002-08-05 2004-07-27 Intel Corporation Refreshing memory cells of a phase change material memory device
JP4189395B2 (ja) * 2004-07-28 2008-12-03 シャープ株式会社 不揮発性半導体記憶装置及び読み出し方法
KR100610014B1 (ko) * 2004-09-06 2006-08-09 삼성전자주식회사 리키지 전류 보상 가능한 반도체 메모리 장치
US7193898B2 (en) * 2005-06-20 2007-03-20 Sandisk Corporation Compensation currents in non-volatile memory read operations
US7679980B2 (en) 2006-11-21 2010-03-16 Qimonda North America Corp. Resistive memory including selective refresh operation
US7990761B2 (en) 2008-03-31 2011-08-02 Ovonyx, Inc. Immunity of phase change material to disturb in the amorphous phase
KR20090126587A (ko) * 2008-06-04 2009-12-09 삼성전자주식회사 상 변화 메모리 장치 및 그것의 읽기 방법
US8406033B2 (en) 2009-06-22 2013-03-26 Macronix International Co., Ltd. Memory device and method for sensing and fixing margin cells
KR20110107190A (ko) 2010-03-24 2011-09-30 삼성전자주식회사 저항성 메모리의 마모 셀 관리 방법 및 장치
US8467237B2 (en) * 2010-10-15 2013-06-18 Micron Technology, Inc. Read distribution management for phase change memory
US20130336047A1 (en) 2012-04-24 2013-12-19 Being Advanced Memory Corporation Cell Refresh in Phase Change Memory
US8885388B2 (en) 2012-10-24 2014-11-11 Marvell World Trade Ltd. Apparatus and method for reforming resistive memory cells
KR102023358B1 (ko) * 2012-10-29 2019-09-20 삼성전자 주식회사 저항체를 이용한 비휘발성 메모리 장치 및 그 구동 방법
KR20140090879A (ko) * 2013-01-10 2014-07-18 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 읽기 방법
US9165683B2 (en) 2013-09-23 2015-10-20 Sandisk Technologies Inc. Multi-word line erratic programming detection
US9257175B2 (en) 2013-09-26 2016-02-09 Intel Corporation Refresh of data stored in a cross-point non-volatile memory
US9286975B2 (en) 2014-03-11 2016-03-15 Intel Corporation Mitigating read disturb in a cross-point memory
US9275730B2 (en) 2014-04-11 2016-03-01 Micron Technology, Inc. Apparatuses and methods of reading memory cells based on response to a test pulse
WO2016084497A1 (ja) 2014-11-26 2016-06-02 ソニー株式会社 メモリシステム、記憶装置、および、メモリシステムの制御方法
KR20160074238A (ko) * 2014-12-18 2016-06-28 에스케이하이닉스 주식회사 전자 장치 및 전자 장치의 동작 방법
US9437293B1 (en) 2015-03-27 2016-09-06 Intel Corporation Integrated setback read with reduced snapback disturb
US9613691B2 (en) 2015-03-27 2017-04-04 Intel Corporation Apparatus and method for drift cancellation in a memory
CN104821179B (zh) * 2015-04-16 2017-09-26 江苏时代全芯存储科技有限公司 记忆体驱动电路
US10482960B2 (en) 2016-02-17 2019-11-19 Intel Corporation Dual demarcation voltage sensing before writes
US9721657B1 (en) * 2016-04-02 2017-08-01 Intel Corporation Managing threshold voltage shift in nonvolatile memory
KR102657562B1 (ko) * 2016-12-02 2024-04-17 에스케이하이닉스 주식회사 비휘발성 메모리 장치

Similar Documents

Publication Publication Date Title
JP2019102117A5 (enExample)
JP6190903B2 (ja) 書き込みおよびベリファイ回路、ならびにその抵抗性メモリの書き込みおよびベリファイ方法
US9129678B2 (en) Method and apparatus for reforming a memory cell of a memory
CN109841248B (zh) 存储装置及其操作方法
KR101732238B1 (ko) 감지 증폭기를 위한 트리밍 가능한 레퍼런스 발생기
KR101624475B1 (ko) 저항 가변 메모리 감지
JP2017059223A5 (enExample)
KR101615435B1 (ko) 센서 저항을 이용한 온도 측정 장치 및 그 방법
US9620208B2 (en) Devices and methods for programming a resistive random-access memory
US9508435B1 (en) Writing method for resistive memory apparatus
TWI569270B (zh) 記憶體操作方法及相關的記憶體裝置
JP5838662B2 (ja) 温度検出回路および燃焼装置
US9230616B2 (en) Memory devices, memory device operational methods, and memory device implementation methods
TW201626373A (zh) 用於電阻式記憶體之感測電路
JP2020118931A5 (enExample)
US20130163348A1 (en) Semiconductor device and method for operating the same
KR20170072892A (ko) 판독 셀에서 판독 마진을 증가시키는 기법
US20130258767A1 (en) Phase-change memory cell
JP6855822B2 (ja) 均等化制御装置及び車載用電源装置
JP6230397B2 (ja) 故障検知装置およびそのプログラム
JP6719521B2 (ja) 抵抗性メモリ素子の操作方法
KR20120112062A (ko) 반도체 메모리 장치
TWI579848B (zh) 記憶體寫入裝置以及方法
Aziza et al. A novel test structure for OxRRAM process variability evaluation
US10079067B1 (en) Data read method and a non-volatile memory apparatus using the same