JP2017059223A5 - - Google Patents

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Publication number
JP2017059223A5
JP2017059223A5 JP2016155467A JP2016155467A JP2017059223A5 JP 2017059223 A5 JP2017059223 A5 JP 2017059223A5 JP 2016155467 A JP2016155467 A JP 2016155467A JP 2016155467 A JP2016155467 A JP 2016155467A JP 2017059223 A5 JP2017059223 A5 JP 2017059223A5
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JP
Japan
Prior art keywords
power consumption
control circuit
processor
memories
operating
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JP2016155467A
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English (en)
Japanese (ja)
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JP2017059223A (ja
JP6788420B2 (ja
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Priority claimed from US14/967,266 external-priority patent/US9733684B2/en
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Publication of JP2017059223A publication Critical patent/JP2017059223A/ja
Publication of JP2017059223A5 publication Critical patent/JP2017059223A5/ja
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Publication of JP6788420B2 publication Critical patent/JP6788420B2/ja
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JP2016155467A 2015-09-14 2016-08-08 電力消費を制御するシステム及びその方法 Active JP6788420B2 (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201562218527P 2015-09-14 2015-09-14
US62/218,527 2015-09-14
US14/967,266 US9733684B2 (en) 2015-09-14 2015-12-11 System and method for controlling power consumption
US14/967,266 2015-12-11

Publications (3)

Publication Number Publication Date
JP2017059223A JP2017059223A (ja) 2017-03-23
JP2017059223A5 true JP2017059223A5 (enExample) 2019-09-19
JP6788420B2 JP6788420B2 (ja) 2020-11-25

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ID=58238363

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JP2016155467A Active JP6788420B2 (ja) 2015-09-14 2016-08-08 電力消費を制御するシステム及びその方法

Country Status (5)

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US (2) US9733684B2 (enExample)
JP (1) JP6788420B2 (enExample)
KR (1) KR102318541B1 (enExample)
CN (1) CN106527652B (enExample)
TW (1) TWI702539B (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9733684B2 (en) * 2015-09-14 2017-08-15 Samsung Electronics Co., Ltd. System and method for controlling power consumption
US11216323B2 (en) 2015-09-16 2022-01-04 Samsung Electronics Co., Ltd. Solid state memory system with low power error correction mechanism and method of operation thereof
US10529407B2 (en) 2017-07-20 2020-01-07 Samsung Electronics Co., Ltd. Memory device including a plurality of power rails and method of operating the same
US10607660B2 (en) 2017-07-20 2020-03-31 Samsung Electronics Co., Ltd. Nonvolatile memory device and operating method of the same
US10535394B2 (en) 2017-07-20 2020-01-14 Samsung Electronics Co., Ltd. Memory device including dynamic voltage and frequency scaling switch and method of operating the same
US10181351B1 (en) * 2017-08-30 2019-01-15 Micron Technology, Inc. Increased NAND performance under high thermal conditions
KR20190093400A (ko) 2018-02-01 2019-08-09 삼성전자주식회사 반도체 메모리 장치 및 반도체 메모리 장치를 포함하는 전자 장치
KR102549346B1 (ko) * 2018-07-24 2023-06-28 삼성전자주식회사 솔리드 스테이트 드라이브 및 그의 메타 데이터 액세스 방법
TWI672705B (zh) * 2018-11-23 2019-09-21 宏碁股份有限公司 儲存裝置、控制方法及控制器
US11921555B2 (en) * 2019-07-26 2024-03-05 Samsung Electronics Co., Ltd. Systems, methods, and devices for providing power to devices through connectors
US20210294407A1 (en) * 2020-03-17 2021-09-23 Micron Technology, Inc. Setting a power mode based on a workload level in a memory sub-system
US12174680B2 (en) 2020-06-03 2024-12-24 Hewlett-Packard Development Company, L.P. Surge recovery with processor power control
CN111752367B (zh) * 2020-06-12 2021-10-26 深圳忆联信息系统有限公司 固态硬盘功耗降低方法、装置、计算机设备和存储介质
US12444450B2 (en) 2021-11-16 2025-10-14 Samsung Electronics Co., Ltd. Memory device and method for managing dynamic voltage frequency scaling operations based on host configuration
JP7724343B1 (ja) * 2024-09-02 2025-08-15 レノボ・シンガポール・プライベート・リミテッド 情報処理装置および制御方法

Family Cites Families (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009021080A2 (en) * 2007-08-06 2009-02-12 Great Lakes Biosciences, Llc Methods and apparatus for electrical stimulation of tissues using signals that minimize the effects of tissue impedance
US7539881B2 (en) * 2006-04-15 2009-05-26 Hewlett-Packard Development Company, L.P. System and method for dynamically adjusting power caps for electronic components based on power consumption
US8001407B2 (en) * 2006-10-31 2011-08-16 Hewlett-Packard Development Company, L.P. Server configured for managing power and performance
US7725409B2 (en) * 2007-06-05 2010-05-25 Motorola, Inc. Gene expression programming based on Hidden Markov Models
US20090132842A1 (en) * 2007-11-15 2009-05-21 International Business Machines Corporation Managing Computer Power Consumption In A Computer Equipment Rack
US20110047316A1 (en) 2009-08-19 2011-02-24 Dell Products L.P. Solid state memory device power optimization
US8880202B2 (en) * 2010-07-09 2014-11-04 Emerson Process Management Power & Water Solutions, Inc. Optimization system using an iteratively coupled expert engine
US8738937B2 (en) * 2010-07-13 2014-05-27 Intel Corporation Method and apparatus to limit memory power
US8826051B2 (en) * 2010-07-26 2014-09-02 Apple Inc. Dynamic allocation of power budget to a system having non-volatile memory and a processor
US8364103B2 (en) * 2010-09-21 2013-01-29 Intel Mobile Communications GmbH Adaptive adjustment of active area for power amplifier
DE112011103732B4 (de) * 2010-11-09 2014-09-18 International Business Machines Corporation Energiegewinnung zeitlich variierender Energiequellen durch variieren der Rechenarbeitslast
US8543851B2 (en) * 2010-12-29 2013-09-24 Stmicroelectronics, Inc. System and method for microeconomic optimization of power usage in a device
US20130097433A1 (en) 2011-10-18 2013-04-18 Stec, Inc. Systems and methods for dynamic resource management in solid state drive system
US9075610B2 (en) * 2011-12-15 2015-07-07 Intel Corporation Method, apparatus, and system for energy efficiency and energy conservation including thread consolidation
US9158351B2 (en) * 2012-03-29 2015-10-13 Intel Corporation Dynamic power limit sharing in a platform
US8984308B2 (en) * 2012-12-03 2015-03-17 Qualcomm Incorporated System and method of adaptive voltage scaling
US9317212B2 (en) 2012-12-18 2016-04-19 Intel Corporation Method and apparatus for controlling a storage device
US9280191B2 (en) * 2013-01-21 2016-03-08 Dell Products Lp. Systems and methods for power supply configuration and control
US9575542B2 (en) * 2013-01-31 2017-02-21 Hewlett Packard Enterprise Development Lp Computer power management
US8854929B1 (en) * 2013-03-06 2014-10-07 Western Digital Technologies, Inc. Disk drive calibrating laser power and write current for heat assisted magnetic recording
US9213400B2 (en) 2013-03-14 2015-12-15 Intel Corporation Apparatus and method to provide near zero power DEVSLP in SATA drives
US9438242B2 (en) * 2013-07-12 2016-09-06 Freescale Semiconductor, Inc. Systems and methods for reducing power consumption in semiconductor devices
JP6244785B2 (ja) * 2013-09-30 2017-12-13 日本電気株式会社 It機器
US9652026B2 (en) * 2014-12-21 2017-05-16 Qualcomm Incorporated System and method for peak dynamic power management in a portable computing device
US10101786B2 (en) 2014-12-22 2018-10-16 Intel Corporation Holistic global performance and power management
US9733684B2 (en) * 2015-09-14 2017-08-15 Samsung Electronics Co., Ltd. System and method for controlling power consumption
US10241701B2 (en) 2015-09-16 2019-03-26 Samsung Electronics Co., Ltd. Solid state memory system with power management mechanism and method of operation thereof
US9711232B2 (en) 2015-09-22 2017-07-18 Samsung Electronics Co., Ltd. Dynamic non-volatile memory operation scheduling for controlling power consumption of solid-state drives

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