JP2018512736A - 集積回路パッケージ用基板 - Google Patents
集積回路パッケージ用基板 Download PDFInfo
- Publication number
- JP2018512736A JP2018512736A JP2017551215A JP2017551215A JP2018512736A JP 2018512736 A JP2018512736 A JP 2018512736A JP 2017551215 A JP2017551215 A JP 2017551215A JP 2017551215 A JP2017551215 A JP 2017551215A JP 2018512736 A JP2018512736 A JP 2018512736A
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- JP
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- Prior art keywords
- metal
- thin plate
- integrated circuit
- circuit package
- metal thin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49894—Materials of the insulating layers or coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Wire Bonding (AREA)
- Laminated Bodies (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
110:コア部
121:第1の金属薄板
122:第2の金属薄板
130:金属ライン
140:中間層
150:ポリマー層
Claims (10)
- ガラスからなるコア部;
前記コア部の上部に形成されCuからなる第1の金属薄板;
前記コア部の下部に形成されCuからなる第2の金属薄板;
前記第1の金属薄板、前記コア部、及び前記第2の金属薄板を貫通する形態に形成されて、前記第1の金属薄板と前記第2の金属薄板とを電気的に接続させる、Cuからなる金属ライン;及び
前記金属ラインの外周面に形成される中間層;
を含み、
前記中間層は、
Cu2O、遷移金属がドープされたCu2O、及びCuと遷移金属を含む金属酸化物のいずれか一種からなることを特徴とする、集積回路パッケージ用基板。 - 前記遷移金属は、前記Cu2Oにx原子%含まれていることを特徴とする、請求項1に記載の集積回路パッケージ用基板。
ここで、前記xの範囲は5<x<10である。 - 前記遷移金属は、Ti、Cr、Hf、Nb、及びTaを含む候補群から選択されたいずれか一種または二種以上であることを特徴とする、請求項1に記載の集積回路パッケージ用基板。
- 前記金属酸化物は、三元系金属酸化物または四元系金属酸化物からなるものであることを特徴とする、請求項1に記載の集積回路パッケージ用基板。
- 前記金属酸化物はペロブスカイトからなるものであることを特徴とする、請求項4に記載の集積回路パッケージ用基板。
- 前記金属酸化物は、デラフォサイトからなるものであることを特徴とする、請求項4に記載の集積回路パッケージ用基板。
- 半導体チップと印刷回路基板との間に介在して前記半導体チップと前記印刷回路基板とを電気的に接続させることを特徴とする、請求項1に記載の集積回路パッケージ用基板。
- 前記第1の金属薄板は、前記半導体チップに電気的に接続され、前記第2の金属薄板は、前記印刷回路基板に電気的に接続されることを特徴とする、請求項7に記載の集積回路パッケージ用基板。
- 前記第1の金属薄板と前記コア部との間及び前記コア部と前記第2の金属薄板との間にそれぞれ形成されるポリマー層を更に含むことを特徴とする、請求項1に記載の集積回路パッケージ用基板。
- 前記ポリマー層は、PPG(プリプレグ)からなるものであることを特徴とする、請求項9に記載の集積回路パッケージ用基板。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020150048473A KR101795480B1 (ko) | 2015-04-06 | 2015-04-06 | 집적회로 패키지용 기판 |
KR10-2015-0048473 | 2015-04-06 | ||
PCT/KR2016/003560 WO2016163728A1 (ko) | 2015-04-06 | 2016-04-06 | 집적회로 패키지용 기판 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2018512736A true JP2018512736A (ja) | 2018-05-17 |
JP6729601B2 JP6729601B2 (ja) | 2020-07-22 |
Family
ID=57072804
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2017551215A Active JP6729601B2 (ja) | 2015-04-06 | 2016-04-06 | 集積回路パッケージ用基板 |
Country Status (6)
Country | Link |
---|---|
US (1) | US10026683B2 (ja) |
JP (1) | JP6729601B2 (ja) |
KR (1) | KR101795480B1 (ja) |
CN (1) | CN107438898B (ja) |
TW (1) | TWI622140B (ja) |
WO (1) | WO2016163728A1 (ja) |
Citations (7)
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JPH0653632A (ja) * | 1992-07-30 | 1994-02-25 | Taiyo Yuden Co Ltd | 配線基板 |
JPH088498A (ja) * | 1994-06-21 | 1996-01-12 | Canon Inc | 配線構造、その製造方法および該配線構造を用いた画像形成装置 |
JP2003218525A (ja) * | 2002-01-18 | 2003-07-31 | Fujitsu Ltd | 回路基板及びその製造方法 |
JP2006024672A (ja) * | 2004-07-07 | 2006-01-26 | Asahi Kasei Corp | 配線回路板の製造方法 |
WO2009017146A1 (ja) * | 2007-07-31 | 2009-02-05 | Hitachi Metals, Ltd. | Cu系配線膜 |
JP2014120689A (ja) * | 2012-12-18 | 2014-06-30 | Hitachi Chemical Co Ltd | 積層体、積層板、多層積層板、プリント配線板、多層プリント配線板及び積層板の製造方法 |
JP2014127701A (ja) * | 2012-12-27 | 2014-07-07 | Ibiden Co Ltd | 配線板及びその製造方法 |
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-
2015
- 2015-04-06 KR KR1020150048473A patent/KR101795480B1/ko active IP Right Grant
-
2016
- 2016-04-06 CN CN201680020505.1A patent/CN107438898B/zh active Active
- 2016-04-06 WO PCT/KR2016/003560 patent/WO2016163728A1/ko active Application Filing
- 2016-04-06 JP JP2017551215A patent/JP6729601B2/ja active Active
- 2016-04-06 TW TW105110804A patent/TWI622140B/zh active
- 2016-04-06 US US15/562,863 patent/US10026683B2/en active Active
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0653632A (ja) * | 1992-07-30 | 1994-02-25 | Taiyo Yuden Co Ltd | 配線基板 |
JPH088498A (ja) * | 1994-06-21 | 1996-01-12 | Canon Inc | 配線構造、その製造方法および該配線構造を用いた画像形成装置 |
JP2003218525A (ja) * | 2002-01-18 | 2003-07-31 | Fujitsu Ltd | 回路基板及びその製造方法 |
JP2006024672A (ja) * | 2004-07-07 | 2006-01-26 | Asahi Kasei Corp | 配線回路板の製造方法 |
WO2009017146A1 (ja) * | 2007-07-31 | 2009-02-05 | Hitachi Metals, Ltd. | Cu系配線膜 |
JP2014120689A (ja) * | 2012-12-18 | 2014-06-30 | Hitachi Chemical Co Ltd | 積層体、積層板、多層積層板、プリント配線板、多層プリント配線板及び積層板の製造方法 |
JP2014127701A (ja) * | 2012-12-27 | 2014-07-07 | Ibiden Co Ltd | 配線板及びその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
KR20160119590A (ko) | 2016-10-14 |
JP6729601B2 (ja) | 2020-07-22 |
KR101795480B1 (ko) | 2017-11-10 |
US20180114746A1 (en) | 2018-04-26 |
TW201705396A (zh) | 2017-02-01 |
CN107438898A (zh) | 2017-12-05 |
TWI622140B (zh) | 2018-04-21 |
WO2016163728A1 (ko) | 2016-10-13 |
US10026683B2 (en) | 2018-07-17 |
CN107438898B (zh) | 2020-08-07 |
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