JP2017514319A5 - - Google Patents

Download PDF

Info

Publication number
JP2017514319A5
JP2017514319A5 JP2017507937A JP2017507937A JP2017514319A5 JP 2017514319 A5 JP2017514319 A5 JP 2017514319A5 JP 2017507937 A JP2017507937 A JP 2017507937A JP 2017507937 A JP2017507937 A JP 2017507937A JP 2017514319 A5 JP2017514319 A5 JP 2017514319A5
Authority
JP
Japan
Prior art keywords
layer
type
semiconductor device
substrate
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2017507937A
Other languages
English (en)
Japanese (ja)
Other versions
JP6657183B2 (ja
JP2017514319A (ja
Filing date
Publication date
Priority claimed from US14/555,330 external-priority patent/US9385187B2/en
Application filed filed Critical
Publication of JP2017514319A publication Critical patent/JP2017514319A/ja
Publication of JP2017514319A5 publication Critical patent/JP2017514319A5/ja
Application granted granted Critical
Publication of JP6657183B2 publication Critical patent/JP6657183B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2017507937A 2014-04-25 2015-04-27 高ブレークダウンｎ型埋め込み層 Active JP6657183B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201461984205P 2014-04-25 2014-04-25
US61/984,205 2014-04-25
US14/555,330 2014-11-26
US14/555,330 US9385187B2 (en) 2014-04-25 2014-11-26 High breakdown N-type buried layer
PCT/US2015/027699 WO2015164853A1 (en) 2014-04-25 2015-04-27 High breakdown n-type buried layer

Publications (3)

Publication Number Publication Date
JP2017514319A JP2017514319A (ja) 2017-06-01
JP2017514319A5 true JP2017514319A5 (enExample) 2018-06-07
JP6657183B2 JP6657183B2 (ja) 2020-03-04

Family

ID=54333345

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017507937A Active JP6657183B2 (ja) 2014-04-25 2015-04-27 高ブレークダウンｎ型埋め込み層

Country Status (4)

Country Link
US (2) US9385187B2 (enExample)
JP (1) JP6657183B2 (enExample)
CN (1) CN106233439B (enExample)
WO (1) WO2015164853A1 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9385187B2 (en) * 2014-04-25 2016-07-05 Texas Instruments Incorporated High breakdown N-type buried layer
DE102017103782B4 (de) * 2017-02-23 2021-03-25 Infineon Technologies Ag Halbleitervorrichtung mit einer vergrabenen Schicht und Herstellungsverfahren hierfür
FR3089679A1 (fr) 2018-12-11 2020-06-12 Stmicroelectronics (Tours) Sas Dispositif de commutation et procédé de fabrication d'un tel dispositif
CN114695505B (zh) * 2020-12-29 2025-01-24 无锡华润上华科技有限公司 电子设备、半导体器件及其制备方法
CN118041270A (zh) * 2022-11-04 2024-05-14 广州乐仪投资有限公司 半导体结构的制备方法、半导体结构及电子设备

Family Cites Families (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4666556A (en) 1986-05-12 1987-05-19 International Business Machines Corporation Trench sidewall isolation by polysilicon oxidation
US4980747A (en) 1986-12-22 1990-12-25 Texas Instruments Inc. Deep trench isolation with surface contact to substrate
JPH0271526A (ja) * 1988-07-07 1990-03-12 Matsushita Electric Ind Co Ltd 半導体集積回路およびその製造方法
JPH0442959A (ja) * 1990-06-06 1992-02-13 Fujitsu Ltd 半導体集積回路装置
GB2248142A (en) * 1990-09-19 1992-03-25 Koninkl Philips Electronics Nv A method of manufacturing a semiconductor device
US5192708A (en) * 1991-04-29 1993-03-09 International Business Machines Corporation Sub-layer contact technique using in situ doped amorphous silicon and solid phase recrystallization
JPH0536823A (ja) * 1991-08-01 1993-02-12 Mitsubishi Electric Corp 半導体集積回路
US5994755A (en) * 1991-10-30 1999-11-30 Intersil Corporation Analog-to-digital converter and method of fabrication
JPH0799771B2 (ja) 1992-06-26 1995-10-25 インターナショナル・ビジネス・マシーンズ・コーポレイション 皮膜中の応力を制御する方法
JP3285435B2 (ja) * 1993-07-07 2002-05-27 三菱電機株式会社 半導体装置およびその製造方法
JPH08236614A (ja) * 1995-02-27 1996-09-13 Nippondenso Co Ltd 半導体装置の製造方法
JP3334027B2 (ja) * 1996-02-06 2002-10-15 富士電機株式会社 高耐圧横型半導体装置
US6218722B1 (en) 1997-02-14 2001-04-17 Gennum Corporation Antifuse based on silicided polysilicon bipolar transistor
JPH11251447A (ja) * 1998-02-27 1999-09-17 Nippon Foundry Inc 半導体装置及びその製造方法
US20010013610A1 (en) * 1999-08-02 2001-08-16 Min-Hwa Chi Vertical bipolar transistor based on gate induced drain leakage current
US6661042B2 (en) * 2002-03-11 2003-12-09 Monolithic System Technology, Inc. One-transistor floating-body DRAM cell in bulk CMOS process with electrically isolated charge storage region
US6943426B2 (en) 2002-08-14 2005-09-13 Advanced Analogic Technologies, Inc. Complementary analog bipolar transistors with trench-constrained isolation diffusion
US7041572B2 (en) 2002-10-25 2006-05-09 Vanguard International Semiconductor Corporation Fabrication method for a deep trench isolation structure of a high-voltage device
US7635621B2 (en) * 2002-11-22 2009-12-22 Micrel, Inc. Lateral double-diffused metal oxide semiconductor (LDMOS) device with an enhanced drift region that has an improved Ron area product
SE526366C3 (sv) * 2003-03-21 2005-10-26 Silex Microsystems Ab Elektriska anslutningar i substrat
US6815780B1 (en) 2003-04-15 2004-11-09 Motorola, Inc. Semiconductor component with substrate injection protection structure
JP4292964B2 (ja) * 2003-08-08 2009-07-08 三菱電機株式会社 縦型半導体装置
US7639713B2 (en) 2004-01-21 2009-12-29 Emc Corporation Database block network attached storage packet joining
JP4592340B2 (ja) 2004-06-29 2010-12-01 三洋電機株式会社 半導体装置の製造方法
JP4806250B2 (ja) * 2004-11-12 2011-11-02 台湾積體電路製造股▲ふん▼有限公司 多種動作電圧を有する集積回路分離用半導体構造
CN101147251B (zh) * 2005-03-24 2010-12-08 Nxp股份有限公司 制备具有掩埋掺杂区的半导体器件的方法
CN1897282A (zh) * 2005-06-30 2007-01-17 St微电子克鲁勒斯图股份公司 包括具有隔离体的一个mos晶体管的存储单元
US7723204B2 (en) 2006-03-27 2010-05-25 Freescale Semiconductor, Inc. Semiconductor device with a multi-plate isolation structure
US7410862B2 (en) 2006-04-28 2008-08-12 International Business Machines Corporation Trench capacitor and method for fabricating the same
KR20090116702A (ko) * 2007-01-09 2009-11-11 맥스파워 세미컨덕터 인크. 반도체 디바이스
US8614151B2 (en) 2008-01-04 2013-12-24 Micron Technology, Inc. Method of etching a high aspect ratio contact
US7989875B2 (en) * 2008-11-24 2011-08-02 Nxp B.V. BiCMOS integration of multiple-times-programmable non-volatile memories
KR101610826B1 (ko) 2009-03-18 2016-04-11 삼성전자주식회사 커패시터를 갖는 반도체 장치의 형성방법
US8476530B2 (en) 2009-06-22 2013-07-02 International Business Machines Corporation Self-aligned nano-scale device with parallel plate electrodes
US20110062554A1 (en) 2009-09-17 2011-03-17 Hsing Michael R High voltage floating well in a silicon die
US8334190B2 (en) 2010-05-07 2012-12-18 Texas Instruments Incorporated Single step CMP for polishing three or more layer film stacks
US8399924B2 (en) 2010-06-17 2013-03-19 Texas Instruments Incorporated High voltage transistor using diluted drain
JP5743831B2 (ja) * 2011-09-29 2015-07-01 株式会社東芝 半導体装置
US8785971B2 (en) * 2011-11-23 2014-07-22 Amazing Microelectronic Corp. Transient voltage suppressor without leakage current
US8642423B2 (en) * 2011-11-30 2014-02-04 International Business Machines Corporation Polysilicon/metal contact resistance in deep trench
US9356133B2 (en) * 2012-02-01 2016-05-31 Texas Instruments Incorporated Medium voltage MOSFET device
US9293357B2 (en) 2012-07-02 2016-03-22 Texas Instruments Incorporated Sinker with a reduced width
US9082719B2 (en) 2012-10-19 2015-07-14 Infineon Technologies Ag Method for removing a dielectric layer from a bottom of a trench
US9136368B2 (en) * 2013-10-03 2015-09-15 Texas Instruments Incorporated Trench gate trench field plate semi-vertical semi-lateral MOSFET
US9385187B2 (en) * 2014-04-25 2016-07-05 Texas Instruments Incorporated High breakdown N-type buried layer

Similar Documents

Publication Publication Date Title
JP2017514319A5 (enExample)
JP2017527110A5 (enExample)
CN102569411B (zh) 半导体器件及其制作方法
CN105720098B (zh) Nldmos及其制作方法
KR101906733B1 (ko) 스위칭 장치와 그 제조 방법
TWI524522B (zh) 帶有累積增益植入物之橫向雙擴散金屬氧化物半導體及其製造方法
JP2006524433A5 (enExample)
JP2011097093A5 (enExample)
WO2012174421A3 (en) Patterned doping for polysilicon emitter solar cells
KR102115619B1 (ko) 반도체 장치 및 그 제조방법
JP2017507502A5 (enExample)
CN105593997A (zh) 碳化硅半导体装置及其制造方法
JP2019046909A5 (enExample)
JP2015126085A5 (enExample)
CN102412126B (zh) 超高压ldmos的工艺制作方法
JP2015023208A (ja) 電界効果トランジスタ及び半導体装置、電界効果トランジスタの製造方法
CN103579005A (zh) 采用高电压反注入的功率晶体管
JP6657183B2 (ja) 高ブレークダウンｎ型埋め込み層
JP2013530527A5 (enExample)
JP2010118672A5 (enExample)
CN103178087A (zh) 超高压ldmos器件结构及制备方法
CN104201203B (zh) 高耐压ldmos器件及其制造方法
CN103035525B (zh) 高压隔离n型ldmos器件的制造方法
CN101375414B (zh) 用于制造太阳能电池的方法和太阳能电池
KR101887910B1 (ko) SiC MOSFET 전력 반도체 소자 및 그 제조방법