JP2017507502A5 - - Google Patents
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- JP2017507502A5 JP2017507502A5 JP2016573708A JP2016573708A JP2017507502A5 JP 2017507502 A5 JP2017507502 A5 JP 2017507502A5 JP 2016573708 A JP2016573708 A JP 2016573708A JP 2016573708 A JP2016573708 A JP 2016573708A JP 2017507502 A5 JP2017507502 A5 JP 2017507502A5
- Authority
- JP
- Japan
- Prior art keywords
- depth
- region
- dopant concentration
- semiconductor material
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000002019 doping agent Substances 0.000 claims 32
- 239000004065 semiconductor Substances 0.000 claims 26
- 239000000463 material Substances 0.000 claims 24
- 238000000034 method Methods 0.000 claims 20
- 210000000746 body region Anatomy 0.000 claims 2
- 230000007423 decrease Effects 0.000 claims 2
- 238000002347 injection Methods 0.000 claims 2
- 239000007924 injection Substances 0.000 claims 2
- 238000002955 isolation Methods 0.000 claims 2
- 229910044991 metal oxide Inorganic materials 0.000 claims 2
- 150000004706 metal oxides Chemical class 0.000 claims 2
- 239000007943 implant Substances 0.000 claims 1
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201461948853P | 2014-03-06 | 2014-03-06 | |
| US61/948,853 | 2014-03-06 | ||
| US14/556,185 US9455332B2 (en) | 2014-03-06 | 2014-11-30 | LDMOS transistor and method of forming the LDMOS transistor with improved Rds*Cgd |
| US14/556,185 | 2014-11-30 | ||
| PCT/US2015/019258 WO2015134909A1 (en) | 2014-03-06 | 2015-03-06 | Ldmos transistor and method of forming the ldmos transistor with improved rds*cgd |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2017507502A JP2017507502A (ja) | 2017-03-16 |
| JP2017507502A5 true JP2017507502A5 (enExample) | 2018-04-12 |
| JP6574792B2 JP6574792B2 (ja) | 2019-09-11 |
Family
ID=54018218
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016573708A Active JP6574792B2 (ja) | 2014-03-06 | 2015-03-06 | Rds×cgdが改善されたldmosトランジスタ、及びrds×cgdが改善されたldmosトランジスタを形成する方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (4) | US9455332B2 (enExample) |
| JP (1) | JP6574792B2 (enExample) |
| CN (2) | CN106030820B (enExample) |
| WO (1) | WO2015134909A1 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104701372B (zh) * | 2013-12-06 | 2017-10-27 | 无锡华润上华科技有限公司 | 横向扩散金属氧化物半导体器件及其制造方法 |
| US20160035822A1 (en) * | 2014-07-30 | 2016-02-04 | Freescale Semiconductor, Inc. | High Voltage Semiconductor Devices and Methods for their Fabrication |
| US9893146B1 (en) * | 2016-10-04 | 2018-02-13 | Monolithic Power Systems, Inc. | Lateral DMOS and the method for forming thereof |
| US9865729B1 (en) | 2016-12-20 | 2018-01-09 | Texas Instruments Incorporated | Laterally diffused metal oxide semiconductor with segmented gate oxide |
| US10103258B2 (en) | 2016-12-29 | 2018-10-16 | Texas Instruments Incorporated | Laterally diffused metal oxide semiconductor with gate poly contact within source window |
| US10529804B2 (en) * | 2017-08-21 | 2020-01-07 | Texas Instruments Incorporated | Integrated circuit, LDMOS with trapezoid JFET, bottom gate and ballast drift and fabrication method |
| US10103233B1 (en) | 2017-09-29 | 2018-10-16 | Nxp Usa, Inc. | Transistor die with drain via arrangement, and methods of manufacture thereof |
| CN116759455A (zh) * | 2018-05-25 | 2023-09-15 | 矽力杰半导体技术(杭州)有限公司 | 横向扩散金属氧化物半导体器件和其制造方法 |
| US10672903B2 (en) * | 2018-07-25 | 2020-06-02 | Nxp Usa, Inc. | Semiconductor device with drain active area |
| CN114256131B (zh) * | 2020-09-23 | 2025-08-19 | 无锡华润上华科技有限公司 | 半导体结构的制备方法及半导体结构 |
| US11658240B2 (en) | 2020-10-04 | 2023-05-23 | Globalfoundries Singapore Pte. Ltd. | Semiconductor transistors on multi-layered substrates |
| CN114122113B (zh) * | 2022-01-27 | 2022-05-03 | 江苏游隼微电子有限公司 | 一种高可靠的mosfet功率半导体器件结构 |
| US12336220B2 (en) | 2022-02-24 | 2025-06-17 | Globalfoundries Singapore Pte. Ltd. | Extended-drain metal-oxide-semiconductor devices with a gap between the drain and body wells |
Family Cites Families (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5386136A (en) * | 1991-05-06 | 1995-01-31 | Siliconix Incorporated | Lightly-doped drain MOSFET with improved breakdown characteristics |
| US6207994B1 (en) * | 1996-11-05 | 2001-03-27 | Power Integrations, Inc. | High-voltage transistor with multi-layer conduction region |
| US6168983B1 (en) * | 1996-11-05 | 2001-01-02 | Power Integrations, Inc. | Method of making a high-voltage transistor with multiple lateral conduction layers |
| US6768171B2 (en) * | 2000-11-27 | 2004-07-27 | Power Integrations, Inc. | High-voltage transistor with JFET conduction channels |
| KR100948139B1 (ko) * | 2003-04-09 | 2010-03-18 | 페어차일드코리아반도체 주식회사 | 높은 브레이크다운 전압 및 낮은 온 저항을 위한 다중전류 이동 경로를 갖는 수평형 이중-확산 모스 트랜지스터 |
| US20080164537A1 (en) * | 2007-01-04 | 2008-07-10 | Jun Cai | Integrated complementary low voltage rf-ldmos |
| US7439584B2 (en) * | 2005-05-19 | 2008-10-21 | Freescale Semiconductor, Inc. | Structure and method for RESURF LDMOSFET with a current diverter |
| EP1946378B1 (en) * | 2005-11-02 | 2012-12-12 | Nxp B.V. | Method of manufacturing a semiconductor device |
| JP2007258283A (ja) * | 2006-03-21 | 2007-10-04 | Toyota Motor Corp | 絶縁ゲート型半導体装置 |
| US7626233B2 (en) * | 2007-04-23 | 2009-12-01 | Infineon Technologies Ag | LDMOS device |
| US7829947B2 (en) * | 2009-03-17 | 2010-11-09 | Alpha & Omega Semiconductor Incorporated | Bottom-drain LDMOS power MOSFET structure having a top drain strap |
| US8304835B2 (en) * | 2009-03-27 | 2012-11-06 | National Semiconductor Corporation | Configuration and fabrication of semiconductor structure using empty and filled wells |
| JP2011100847A (ja) * | 2009-11-05 | 2011-05-19 | Sharp Corp | 半導体装置及びその製造方法 |
| US8362557B2 (en) * | 2009-12-02 | 2013-01-29 | Fairchild Semiconductor Corporation | Stepped-source LDMOS architecture |
| KR101681494B1 (ko) * | 2010-03-03 | 2016-12-01 | 삼성전자 주식회사 | 반도체 장치 |
| KR101196319B1 (ko) * | 2011-01-24 | 2012-11-01 | 주식회사 동부하이텍 | Ldmos 소자와 그 제조 방법 |
| KR101800371B1 (ko) * | 2011-05-27 | 2017-11-23 | 삼성전자주식회사 | 반도체 장치 |
| CN103035717B (zh) * | 2012-07-27 | 2015-10-14 | 上海华虹宏力半导体制造有限公司 | 阶梯形漂移区的ldmos器件及其制造方法 |
| JP2015141996A (ja) * | 2014-01-28 | 2015-08-03 | 株式会社東芝 | 半導体装置及びその製造方法 |
-
2014
- 2014-11-30 US US14/556,185 patent/US9455332B2/en active Active
-
2015
- 2015-03-06 WO PCT/US2015/019258 patent/WO2015134909A1/en not_active Ceased
- 2015-03-06 CN CN201580010177.2A patent/CN106030820B/zh active Active
- 2015-03-06 CN CN201910792601.3A patent/CN110649100B/zh active Active
- 2015-03-06 JP JP2016573708A patent/JP6574792B2/ja active Active
-
2016
- 2016-08-23 US US15/244,616 patent/US10461156B2/en active Active
-
2019
- 2019-10-29 US US16/666,587 patent/US11610968B2/en active Active
-
2023
- 2023-03-13 US US18/120,650 patent/US20230215918A1/en active Pending
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