JP4292964B2 - 縦型半導体装置 - Google Patents
縦型半導体装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 60
- 239000000758 substrate Substances 0.000 claims description 48
- 239000012535 impurity Substances 0.000 claims description 34
- 230000002093 peripheral effect Effects 0.000 claims description 23
- 229910052710 silicon Inorganic materials 0.000 claims description 14
- 239000010703 silicon Substances 0.000 claims description 14
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 4
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 3
- 239000002131 composite material Substances 0.000 claims description 3
- 229910052750 molybdenum Inorganic materials 0.000 claims description 3
- 239000011733 molybdenum Substances 0.000 claims description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 3
- 229910052721 tungsten Inorganic materials 0.000 claims description 3
- 239000010937 tungsten Substances 0.000 claims description 3
- 238000002955 isolation Methods 0.000 description 32
- 230000015556 catabolic process Effects 0.000 description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 14
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 13
- 230000000903 blocking effect Effects 0.000 description 13
- 238000009792 diffusion process Methods 0.000 description 11
- 238000005530 etching Methods 0.000 description 10
- 238000004519 manufacturing process Methods 0.000 description 10
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 9
- 229910052796 boron Inorganic materials 0.000 description 9
- 239000000945 filler Substances 0.000 description 9
- 238000011049 filling Methods 0.000 description 7
- 238000005468 ion implantation Methods 0.000 description 7
- 238000000034 method Methods 0.000 description 7
- 235000012239 silicon dioxide Nutrition 0.000 description 7
- 239000000377 silicon dioxide Substances 0.000 description 7
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 6
- 230000000694 effects Effects 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000007547 defect Effects 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 230000002457 bidirectional effect Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 230000004048 modification Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
- 238000000137 annealing Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 230000006866 deterioration Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000000926 separation method Methods 0.000 description 2
- 238000000547 structure data Methods 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005685 electric field effect Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
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Description
図1及び図2に実施の形態1である耐圧600Vの逆阻止型IGBTの構成を示す。図1は本逆阻止型IGBTに使用されているチップの平面図であり、図2はその周辺部A−A’の断面図である。n型シリコン基板1は互いに平行でかつ対向する第1主面と第2主面を有し、第2主面側より例えばホウ素(ボロン)のようなp型不純物を導入することによって、高濃度のp型コレクタ層2(第1不純物領域)がシリコン基板1とPN接合を形成するように設けられている。
図9に実施の形態2の逆阻止型IGBTの構成を示す。チップの平面図は実施の形態1の図1と同じで、図9はその周辺部A−A’の断面図である。実施の形態1の図1との相違は、p型分離領域14を省略し、その代わり充填物17をp型不純物(例えばホウ素)をドープしたシリコンとしたことである。このような構成にしたことにより、実施の形態1におけるp型分離領域14の機能を充填物17が果たすため、新たにp型分離領域を設けることなく、実施の形態1と同じ効果を有する、より簡素な構成の逆阻止型IGBTが得られる。
実施の形態1のようにトレンチ13内を何らかの充填物16で埋め戻すことは、その充填物による応力により半導体基板1内に結晶欠陥を発生させ、半導体装置の特性に悪影響を与えるため、埋め戻す充填物の体積はできるだけ小さい方が望ましく、その対応として考えられたのが実施の形態3である。図10は実施の形態3である耐圧600Vの逆阻止型IGBTに使用されているチップの平面図である。周辺部A−A’の断面図は図2と同じであるので省略する。図11及び図12は図10のB部の拡大図を示しており、図11は一例で図12は他の例である。図2においては周辺領域において1本の溝として連続的に素子領域を取囲むように設けられているトレンチ13が、図10においては複数の溝として断続的に素子領域を取囲むように設けられている。図10のB部の拡大図を示している図11あるいは同じく図12からもわかるように、この複数の溝の側壁の周囲にp型分離領域14が形成されており、相隣り合うp型分離領域14は間隔Wで隔てられている。図10ではこのように点線状の断続的なトレンチで素子領域を取囲むこととしたので、連続的なトレンチで素子領域を取囲んだ図2の場合より、充填物16の体積が減少し結晶欠陥の発生が少なくなり、IGBTの特性に良い影響を与える。
Claims (4)
- 第1主面及び前記第1主面に対向する第2主面とを有する第1導電型の半導体基板と、
前記半導体基板に設けられた素子領域と、
前記半導体基板で前記素子領域を囲むように設けられた周辺領域と、
前記半導体基板内部に形成され、前記第2主面に露出し、前記半導体基板の第1導電型の不純物濃度より高い不純物濃度を有する第2導電型の第1不純物領域と、
前記周辺領域の外縁部に設けられ、前記素子領域を取囲むように形成されているトレンチと、
前記トレンチの側壁から前記半導体基板内部へと所定の深さで形成され、前記第1主面に露出部分を有するとともに前記第1不純物領域に電気的に連結された第2導電型の2つの第2不純物領域と、
前記周辺領域の第1主面上に設けられたフィールドプレートとを備え、
前記トレンチはその側壁が前記第1主面に対し略垂直を呈し、その深さdと開口幅wとの比d/w(アスペクト比)を5以上100以下とするものであって、前記フィールドプレートは前記2つの第2不純物領域の第1主面への露出部分のうち素子領域から遠い部分で第2不純物領域との電気的接触がなされていることを特徴とする縦型半導体装置。 - 半導体基板はシリコンであって、トレンチ内部はモリブデン、タングステン、又は多結晶シリコンあるいはそれらの複合物が充填されていることを特徴とする請求項1記載の縦型半導体装置。
- 第1主面及び前記第1主面に対向する第2主面とを有する第1導電型の半導体基板と、
前記半導体基板に設けられた素子領域と、
前記半導体基板で前記素子領域を囲むように設けられた周辺領域と、
前記半導体基板内部に形成され、前記第2主面に露出し、前記半導体基板の第1導電型の不純物濃度より高い不純物濃度を有する第2導電型の第1不純物領域と、
前記周辺領域の外縁部に設けられ、所定の間隔で前記素子領域を取囲むように形成されている複数のトレンチと、
前記トレンチの側壁から前記半導体基板内部へと所定の深さで形成され、前記第1不純物領域に電気的に連結された複数の第2導電型の第2不純物領域とを備え、
前記トレンチはその側壁が前記第1主面に対し略垂直を呈し、その深さdと開口幅wとの比d/w(アスペクト比)が5以上100以下であることを特徴とする縦型半導体装置。 - 複数の第2不純物領域の間隔が15μm以下であることを特徴とする請求項3記載の縦型半導体装置。
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
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JP2003398726A JP4292964B2 (ja) | 2003-08-08 | 2003-11-28 | 縦型半導体装置 |
TW093111838A TWI242885B (en) | 2003-08-08 | 2004-04-28 | Vertical semiconductor device and manufacturing method thereof |
US10/834,110 US7009239B2 (en) | 2003-08-08 | 2004-04-29 | Vertical semiconductor device and manufacturing method thereof |
CNB2004100616700A CN100477259C (zh) | 2003-08-08 | 2004-06-23 | 纵型半导体器件及其制造方法 |
KR1020040059709A KR100661109B1 (ko) | 2003-08-08 | 2004-07-29 | 종형 반도체장치 및 그 제조방법 |
EP04018303A EP1505657B1 (en) | 2003-08-08 | 2004-08-02 | Vertical semiconductor device and manufacturing method thereof |
DE602004017675T DE602004017675D1 (de) | 2003-08-08 | 2004-08-02 | Vertikale Halbleitervorrichtung und Verfahren zu deren Herstellung |
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EP (1) | EP1505657B1 (ja) |
JP (1) | JP4292964B2 (ja) |
KR (1) | KR100661109B1 (ja) |
CN (1) | CN100477259C (ja) |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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Families Citing this family (40)
Publication number | Priority date | Publication date | Assignee | Title |
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Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0618255B2 (ja) | 1984-04-04 | 1994-03-09 | 株式会社東芝 | 半導体装置 |
US4976532A (en) | 1988-01-19 | 1990-12-11 | Al-Site Corp. | Hanger for displaying eyeglasses |
US5626268A (en) | 1994-01-11 | 1997-05-06 | B&G Plastics, Inc. | Enhanced retention belt hanger |
JP4696337B2 (ja) | 1999-10-15 | 2011-06-08 | 富士電機システムズ株式会社 | 半導体装置 |
JP4967200B2 (ja) | 2000-08-09 | 2012-07-04 | 富士電機株式会社 | 逆阻止型igbtを逆並列に接続した双方向igbt |
US6538299B1 (en) * | 2000-10-03 | 2003-03-25 | International Business Machines Corporation | Silicon-on-insulator (SOI) trench photodiode |
KR100393199B1 (ko) | 2001-01-15 | 2003-07-31 | 페어차일드코리아반도체 주식회사 | 높은 브레이크다운 전압을 갖는 고전압 반도체 소자 및 그제조방법 |
JP4357753B2 (ja) | 2001-01-26 | 2009-11-04 | 株式会社東芝 | 高耐圧半導体装置 |
EP1267415A3 (en) | 2001-06-11 | 2009-04-15 | Kabushiki Kaisha Toshiba | Power semiconductor device having resurf layer |
JP3673231B2 (ja) * | 2002-03-07 | 2005-07-20 | 三菱電機株式会社 | 絶縁ゲート型半導体装置及びゲート配線構造の製造方法 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2008276788A (ja) * | 2008-05-23 | 2008-11-13 | Hitachi Ltd | 仮想計算機システムの制御方法 |
JP4548514B2 (ja) * | 2008-05-23 | 2010-09-22 | 株式会社日立製作所 | 仮想計算機システムの制御方法 |
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KR20050018600A (ko) | 2005-02-23 |
US20050029568A1 (en) | 2005-02-10 |
KR100661109B1 (ko) | 2006-12-26 |
TW200507268A (en) | 2005-02-16 |
EP1505657A1 (en) | 2005-02-09 |
CN1581506A (zh) | 2005-02-16 |
US7009239B2 (en) | 2006-03-07 |
EP1505657B1 (en) | 2008-11-12 |
CN100477259C (zh) | 2009-04-08 |
DE602004017675D1 (de) | 2008-12-24 |
TWI242885B (en) | 2005-11-01 |
JP2005093972A (ja) | 2005-04-07 |
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