JP2016526750A5 - - Google Patents

Download PDF

Info

Publication number
JP2016526750A5
JP2016526750A5 JP2016525343A JP2016525343A JP2016526750A5 JP 2016526750 A5 JP2016526750 A5 JP 2016526750A5 JP 2016525343 A JP2016525343 A JP 2016525343A JP 2016525343 A JP2016525343 A JP 2016525343A JP 2016526750 A5 JP2016526750 A5 JP 2016526750A5
Authority
JP
Japan
Prior art keywords
refresh
row
dram
open
dram bank
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2016525343A
Other languages
English (en)
Japanese (ja)
Other versions
JP6211186B2 (ja
JP2016526750A (ja
Filing date
Publication date
Priority claimed from US14/148,515 external-priority patent/US9524771B2/en
Application filed filed Critical
Publication of JP2016526750A publication Critical patent/JP2016526750A/ja
Publication of JP2016526750A5 publication Critical patent/JP2016526750A5/ja
Application granted granted Critical
Publication of JP6211186B2 publication Critical patent/JP6211186B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2016525343A 2013-07-12 2014-05-20 Ｄｒａｍサブアレイレベル自律リフレッシュメモリコントローラの最適化 Expired - Fee Related JP6211186B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201361845818P 2013-07-12 2013-07-12
US61/845,818 2013-07-12
US14/148,515 2014-01-06
US14/148,515 US9524771B2 (en) 2013-07-12 2014-01-06 DRAM sub-array level autonomic refresh memory controller optimization
PCT/US2014/038845 WO2015005975A1 (en) 2013-07-12 2014-05-20 Dram sub-array level autonomic refresh memory controller optimization

Publications (3)

Publication Number Publication Date
JP2016526750A JP2016526750A (ja) 2016-09-05
JP2016526750A5 true JP2016526750A5 (enExample) 2017-03-02
JP6211186B2 JP6211186B2 (ja) 2017-10-11

Family

ID=52276986

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016525343A Expired - Fee Related JP6211186B2 (ja) 2013-07-12 2014-05-20 Ｄｒａｍサブアレイレベル自律リフレッシュメモリコントローラの最適化

Country Status (6)

Country Link
US (1) US9524771B2 (enExample)
EP (1) EP3020046A1 (enExample)
JP (1) JP6211186B2 (enExample)
KR (1) KR101763312B1 (enExample)
CN (1) CN105378847B (enExample)
WO (1) WO2015005975A1 (enExample)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9412433B2 (en) * 2014-01-22 2016-08-09 Nanya Technology Corp. Counter based design for temperature controlled refresh
US9659626B1 (en) * 2015-12-26 2017-05-23 Intel Corporation Memory refresh operation with page open
KR102399475B1 (ko) 2015-12-28 2022-05-18 삼성전자주식회사 리프레쉬 콘트롤러 및 이를 포함하는 메모리 장치
US10474581B2 (en) 2016-03-25 2019-11-12 Micron Technology, Inc. Apparatuses and methods for cache operations
US9514800B1 (en) * 2016-03-26 2016-12-06 Bo Liu DRAM and self-refresh method
US10490251B2 (en) 2017-01-30 2019-11-26 Micron Technology, Inc. Apparatuses and methods for distributing row hammer refresh events across a memory device
US10845866B2 (en) * 2017-06-22 2020-11-24 Micron Technology, Inc. Non-volatile memory system or sub-system
US10109339B1 (en) 2017-07-28 2018-10-23 Micron Technology, Inc. Memory devices with selective page-based refresh
KR102499255B1 (ko) 2018-02-19 2023-02-13 에스케이하이닉스 주식회사 통합 메모리 디바이스 및 그의 동작 방법
US11544168B2 (en) 2017-10-30 2023-01-03 SK Hynix Inc. Memory system
KR102414047B1 (ko) 2017-10-30 2022-06-29 에스케이하이닉스 주식회사 통합 메모리 디바이스 및 그의 동작 방법
US11017833B2 (en) 2018-05-24 2021-05-25 Micron Technology, Inc. Apparatuses and methods for pure-time, self adopt sampling for row hammer refresh sampling
US10573370B2 (en) 2018-07-02 2020-02-25 Micron Technology, Inc. Apparatus and methods for triggering row hammer address sampling
KR102578002B1 (ko) * 2018-07-03 2023-09-14 에스케이하이닉스 주식회사 메모리 시스템 및 이의 동작 방법
US10685696B2 (en) 2018-10-31 2020-06-16 Micron Technology, Inc. Apparatuses and methods for access based refresh timing
US10636476B2 (en) * 2018-11-01 2020-04-28 Intel Corporation Row hammer mitigation with randomization of target row selection
WO2020117686A1 (en) 2018-12-03 2020-06-11 Micron Technology, Inc. Semiconductor device performing row hammer refresh operation
CN117198356A (zh) 2018-12-21 2023-12-08 美光科技公司 用于目标刷新操作的时序交错的设备和方法
US10957377B2 (en) 2018-12-26 2021-03-23 Micron Technology, Inc. Apparatuses and methods for distributed targeted refresh operations
US11615831B2 (en) 2019-02-26 2023-03-28 Micron Technology, Inc. Apparatuses and methods for memory mat refresh sequencing
US11227649B2 (en) * 2019-04-04 2022-01-18 Micron Technology, Inc. Apparatuses and methods for staggered timing of targeted refresh operations
US11069393B2 (en) 2019-06-04 2021-07-20 Micron Technology, Inc. Apparatuses and methods for controlling steal rates
US10978132B2 (en) 2019-06-05 2021-04-13 Micron Technology, Inc. Apparatuses and methods for staggered timing of skipped refresh operations
US11023171B2 (en) 2019-07-17 2021-06-01 Micron Technology, Inc. Performing a refresh operation based on a write to read time difference
US11302374B2 (en) 2019-08-23 2022-04-12 Micron Technology, Inc. Apparatuses and methods for dynamic refresh allocation
US11302377B2 (en) * 2019-10-16 2022-04-12 Micron Technology, Inc. Apparatuses and methods for dynamic targeted refresh steals
CN111158585B (zh) * 2019-11-27 2023-08-01 核芯互联科技(青岛)有限公司 一种内存控制器刷新优化方法、装置、设备和存储介质
US11309010B2 (en) 2020-08-14 2022-04-19 Micron Technology, Inc. Apparatuses, systems, and methods for memory directed access pause
US11380382B2 (en) 2020-08-19 2022-07-05 Micron Technology, Inc. Refresh logic circuit layout having aggressor detector circuit sampling circuit and row hammer refresh control circuit
US11348631B2 (en) 2020-08-19 2022-05-31 Micron Technology, Inc. Apparatuses, systems, and methods for identifying victim rows in a memory device which cannot be simultaneously refreshed
CN114255799B (zh) * 2020-09-22 2023-10-17 长鑫存储技术有限公司 存储器数据刷新方法及其控制器、存储器
US11557331B2 (en) 2020-09-23 2023-01-17 Micron Technology, Inc. Apparatuses and methods for controlling refresh operations
US12308069B2 (en) * 2020-10-26 2025-05-20 Qualcomm Incorporated DRAM with quick random row refresh for rowhammer mitigation
US11222686B1 (en) 2020-11-12 2022-01-11 Micron Technology, Inc. Apparatuses and methods for controlling refresh timing
US11264079B1 (en) 2020-12-18 2022-03-01 Micron Technology, Inc. Apparatuses and methods for row hammer based cache lockdown
KR102890189B1 (ko) 2021-08-26 2025-11-21 삼성전자주식회사 메모리 장치
KR20230031617A (ko) * 2021-08-27 2023-03-07 에스케이하이닉스 주식회사 데이터를 리프레쉬하는 데이터 저장 장치 및 그 동작 방법
US12112787B2 (en) 2022-04-28 2024-10-08 Micron Technology, Inc. Apparatuses and methods for access based targeted refresh operations
US12125514B2 (en) 2022-04-28 2024-10-22 Micron Technology, Inc. Apparatuses and methods for access based refresh operations
CN115691604A (zh) * 2022-10-27 2023-02-03 湖南国科微电子股份有限公司 存储器刷新控制方法、刷新控制器及电子设备

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010040833A1 (en) 1998-12-04 2001-11-15 Zohar Bogin Method and apparatus for self timing refresh
JP2001357670A (ja) * 2000-04-14 2001-12-26 Mitsubishi Electric Corp 半導体記憶装置
EP2056301B1 (en) 2000-07-07 2011-11-30 Mosaid Technologies Incorporated A high speed dram architecture with uniform access latency
JP2003123470A (ja) 2001-10-05 2003-04-25 Mitsubishi Electric Corp 半導体記憶装置
CN100517499C (zh) * 2003-05-13 2009-07-22 矽利康创新Isi有限公司 半导体存储器器件及其操作方法
US20040228168A1 (en) * 2003-05-13 2004-11-18 Richard Ferrant Semiconductor memory device and method of operating same
JP2006107245A (ja) * 2004-10-07 2006-04-20 Canon Inc メモリコントローラ
US7433261B2 (en) * 2005-10-17 2008-10-07 Infineon Technologies Ag Directed auto-refresh for a dynamic random access memory
JP2009181666A (ja) 2008-01-31 2009-08-13 Sony Corp 半導体メモリ装置およびその動作方法
EP2269364A4 (en) * 2008-04-25 2016-12-28 ERICSSON TELEFON AB L M (publ) METHODS AND INTERACTIVE ARRANGEMENTS FOR CALLER INFORMATION SERVICES IN A COMMUNICATION NETWORK
US7755967B2 (en) * 2008-09-29 2010-07-13 Qimonda North America Corp. Memory device refresh method and apparatus
US8310893B2 (en) 2009-12-16 2012-11-13 Micron Technology, Inc. Techniques for reducing impact of array disturbs in a semiconductor memory device
WO2012074724A1 (en) 2010-12-03 2012-06-07 Rambus Inc. Memory refresh method and devices
US9293187B2 (en) 2011-09-26 2016-03-22 Cisco Technology, Inc. Methods and apparatus for refreshing digital memory circuits
US8982654B2 (en) 2013-07-05 2015-03-17 Qualcomm Incorporated DRAM sub-array level refresh

Similar Documents

Publication Publication Date Title
JP2016526750A5 (enExample)
JP2016526749A5 (enExample)
JP6211186B2 (ja) Ｄｒａｍサブアレイレベル自律リフレッシュメモリコントローラの最適化
JP2012014824A5 (enExample)
JP2012142562A5 (ja) 半導体装置
US9824742B1 (en) DRAM access in self-refresh state
JP6227774B2 (ja) Ｄｒａｍサブアレイレベルリフレッシュ
JP2008524774A (ja) アクティブリフレッシュマネージメントに関する方法、装置及びシステム
JP2017516123A5 (enExample)
JP2018513517A (ja) サブアレイを有するマルチビットスピントルクトランスファ磁気抵抗ランダムアクセスメモリ
WO2005119690A1 (en) Method and system for providing independent bank refresh for volatile memories
JP2016526748A5 (enExample)
JP2008525942A (ja) 有向自動リフレッシュ同期
KR102501651B1 (ko) 리프레쉬 제어 장치
KR100871080B1 (ko) 휘발성 메모리들을 위해 지시된 뱅크 리프레시를 제공하는방법 및 시스템
JP2016515269A5 (enExample)
JP2016515274A5 (enExample)
WO2013109284A1 (en) Multi-purpose register programming via per dram addressability mode
JP2002305437A5 (enExample)
JP2011018427A5 (enExample)
KR102709074B1 (ko) 리프레시 정보 생성기를 포함하는 휘발성 메모리 장치 및 전자 장치, 그것의 정보 제공 방법, 그리고 그것의 리프레시 제어 방법
JP2009224016A (ja) リフレッシュ制御装置及び方法
JP2015528620A5 (enExample)
KR20160049458A (ko) 휘발성 메모리 셀프 디프레쉬
US7778103B2 (en) Semiconductor memory device for independently selecting mode of memory bank and method of controlling thereof