JP2015190020A - タングステン膜の成膜方法 - Google Patents
タングステン膜の成膜方法 Download PDFInfo
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- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 title claims abstract description 104
- 229910052721 tungsten Inorganic materials 0.000 title claims abstract description 103
- 239000010937 tungsten Substances 0.000 title claims abstract description 103
- 238000000034 method Methods 0.000 title claims description 72
- 238000005530 etching Methods 0.000 claims abstract description 49
- 239000000758 substrate Substances 0.000 claims abstract description 29
- 238000010438 heat treatment Methods 0.000 claims abstract description 11
- 239000011800 void material Substances 0.000 claims abstract description 10
- 230000015572 biosynthetic process Effects 0.000 claims description 32
- 239000002994 raw material Substances 0.000 claims description 25
- 238000003860 storage Methods 0.000 claims description 12
- 230000009471 action Effects 0.000 claims description 10
- 230000002411 adverse Effects 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract 1
- 238000007670 refining Methods 0.000 abstract 1
- 239000007789 gas Substances 0.000 description 215
- 238000005755 formation reaction Methods 0.000 description 31
- 230000008569 process Effects 0.000 description 23
- 238000010926 purge Methods 0.000 description 20
- 238000005229 chemical vapour deposition Methods 0.000 description 15
- 239000012159 carrier gas Substances 0.000 description 12
- 239000004065 semiconductor Substances 0.000 description 10
- 238000000231 atomic layer deposition Methods 0.000 description 9
- 239000000463 material Substances 0.000 description 8
- 230000004888 barrier function Effects 0.000 description 4
- 239000010410 layer Substances 0.000 description 4
- 230000007246 mechanism Effects 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 230000008021 deposition Effects 0.000 description 3
- 229910052731 fluorine Inorganic materials 0.000 description 3
- 239000011737 fluorine Substances 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 230000009257 reactivity Effects 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000009833 condensation Methods 0.000 description 1
- 230000005494 condensation Effects 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000003870 refractory metal Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- NXHILIPIEUBEPD-UHFFFAOYSA-H tungsten hexafluoride Chemical compound F[W](F)(F)(F)(F)F NXHILIPIEUBEPD-UHFFFAOYSA-H 0.000 description 1
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Abstract
【解決手段】チャンバー内にホールを有するウエハを配置し、WCl6ガスおよびH2ガスを、同時にまたは交互に供給し、ウエハを加熱しつつこれらのガスを反応させて、ホール内にタングステンの埋め込み部を形成し(ステップ1)、次いで、チャンバー内にWCl6ガスを供給し、埋め込み部の上部をエッチングして開口を形成し(ステップ2)、次いで、チャンバー内にWCl6ガスおよび還元ガスを、同時にまたは交互に供給し、ウエハを加熱しつつWCl6ガスおよび還元ガスを反応させて、開口が形成された埋め込み部を有するウエハに対してタングステン膜を成膜する(ステップ3)。
【選択図】 図2
Description
図1は本発明の実施形態に係るタングステン膜の成膜方法を実施するための成膜装置の一例を示す断面図である。
次に、以上のように構成された成膜装置100を用いて行われる成膜方法の第1の実施形態について説明する。図2は本発明の第1の実施形態に係る成膜方法のフローチャート、図3はその際の工程断面図である。
まず、CVD法による成膜について説明する。
図4は、CVD法による成膜の際の処理レシピを示す図である。最初に、バルブ37,37aおよび45を閉じた状態で、バルブ63および73を開き、N2ガス供給源61,71からのN2ガス(原料ガスライン側のパージガスおよびH2ガスライン側のパージガス)をチャンバー1内に供給して圧力を上昇させ、サセプタ2上のウエハWの温度を安定させる。
次に、ALD法による成膜について説明する。
図5は、ALD法による成膜の際の処理レシピを示す図である。最初にCVD法のときと同様、バルブ37,37aおよび45を閉じた状態とし、バルブ63および73を開き、N2ガス供給源61,71からのN2ガス(原料ガスライン側のパージガスおよびH2ガスライン側のパージガス)をチャンバー1内に供給して圧力を上昇させ、サセプタ2上のウエハWの温度を安定させる。
・CVD法
キャリアN2ガス流量:20〜500sccm(mL/min)
(WCl6ガス供給量として、0.25〜15sccm(mL/min))
H2ガス流量:500〜5000sccm(mL/min)
成膜原料タンクの加温温度:130〜170℃
・ALD法
キャリアN2ガス流量:20〜500sccm(mL/min)
(WCl6ガス供給量として、0.25〜15sccm(mL/min)
WCl6ガス供給時間(1回あたり):0.5〜10sec
H2ガス流量:500〜5000sccm(mL/min)
H2ガス供給時間:(1回あたり):0.5〜10sec
成膜原料タンクの加温温度:130〜170℃
チャンバー内の圧力:1〜30Torr(133〜4000Pa)
キャリアN2ガス流量:50〜500sccm(mL/min)
(WCl6ガス供給量として、1〜10sccm(mL/min))
H2ガス流量:0sccm(mL/min)
成膜原料タンクの加温温度:130〜170℃
次に、以上のように構成された成膜装置100を用いて行われる成膜方法の第2の実施形態について説明する。図6は本発明の一実施形態に係る成膜方法のフローチャート、図7はその際の工程断面図である。
以上、本発明の実施形態について説明したが、本発明は上記実施形態に限定されることなく種々変形可能である。例えば、上記実施形態では、タングステン膜を形成してホールにタングステンを埋め込む場合について示したが、ホールに限らず、トレンチ等の他の凹部に対してタングステン膜を埋め込む場合にも適用することができる。
2;サセプタ
5;ヒーター
10;シャワーヘッド
30;ガス供給機構
31;成膜原料タンク
42;H2ガス供給源
50;制御部
51;プロセスコントローラ
53;記憶部
61,71;N2ガス供給源
100;成膜装置
201;下地
202;層間絶縁膜
203;ホール
204,204a;埋め込み部
205;ボイド(シーム)
206;開口
207;空隙
W;半導体ウエハ(被処理基板)
Claims (9)
- 処理容器内に凹部を有する被処理基板を配置し、減圧雰囲気下でタングステン原料としてのWCl6ガスおよび還元ガスを、同時にまたは交互に供給し、前記被処理基板を加熱しつつWCl6ガスおよび還元ガスを反応させて、前記被処理基板にタングステン膜を成膜して前記凹部内にタングステンの埋め込み部を形成する第1工程と、
前記処理容器内にWCl6ガスを供給し、前記埋め込み部の上部をエッチングして開口を形成する第2工程と、
前記処理容器内にWCl6ガスおよび還元ガスを、同時にまたは交互に供給し、前記被処理基板を加熱しつつWCl6ガスおよび還元ガスを反応させて、前記開口が形成された埋め込み部を有する前記被処理基板に対してタングステン膜を成膜する第3工程と
を有することを特徴とするタングステン膜の成膜方法。 - 前記第2工程は、前記処理容器内にWCl6ガスとともに還元ガスを供給することを特徴とする請求項1に記載のタングステン膜の成膜方法。
- 前記還元ガスは、H2ガスであることを特徴とする請求項1または請求項2に記載のタングステン膜の成膜方法。
- 前記第1工程から前記第3工程は、400℃以上の温度で行うことを特徴とする請求項1から請求項3のいずれか1項に記載のタングステン膜の成膜方法。
- 前記第1工程および前記第3工程は、前記処理容器内の圧力を10Torr以上にして行うことを特徴とする請求項4に記載のタングステン膜の成膜方法。
- 処理容器内に凹部を有する被処理基板を配置し、減圧雰囲気下でタングステン原料としてのWCl6ガスおよび還元ガスを、同時にまたは交互に供給し、被処理基板を加熱しつつWCl6ガスおよび還元ガスを反応させるとともに、WCl6ガスのエッチング作用により、前記凹部の上部に開口を有する空隙が生じるように、被処理基板にタングステン膜を成膜して前記凹部内にタングステンの埋め込み部を形成する工程と、
前記処理容器内にWCl6ガスおよび還元ガスを、同時にまたは交互に供給し、被処理基板を加熱しつつWCl6ガスおよび還元ガスを反応させて、前記埋め込み部を有する基板に対して前記空隙にタングステン膜が埋め込まれるようにタングステン膜を成膜する工程と
を有することを特徴とするタングステン膜の成膜方法。 - 前記還元ガスは、H2ガスであることを特徴とする請求項6に記載のタングステン膜の成膜方法。
- 前記いずれの工程も、400℃以上の温度で行うことを特徴とする請求項6または請求項7に記載のタングステン膜の成膜方法。
- コンピュータ上で動作し、成膜装置を制御するためのプログラムが記憶された記憶媒体であって、前記プログラムは、実行時に、請求項1から請求項8のいずれかのタングステン膜の成膜方法が行われるように、コンピュータに前記成膜装置を制御させることを特徴とする記憶媒体。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014069008A JP6297884B2 (ja) | 2014-03-28 | 2014-03-28 | タングステン膜の成膜方法 |
US14/668,564 US9472454B2 (en) | 2014-03-28 | 2015-03-25 | Tungsten film forming method |
TW104109665A TWI642140B (zh) | 2014-03-28 | 2015-03-26 | Film formation method of tungsten film |
KR1020150042116A KR20150112863A (ko) | 2014-03-28 | 2015-03-26 | 텅스텐 막의 성막 방법 |
CN201510142640.0A CN104947065B (zh) | 2014-03-28 | 2015-03-27 | 钨膜的成膜方法 |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61224313A (ja) * | 1985-03-29 | 1986-10-06 | Hitachi Ltd | 気相薄膜成長方法 |
JPH08241895A (ja) * | 1995-03-03 | 1996-09-17 | Nec Corp | 半導体装置及びその製造方法 |
WO2010064470A1 (ja) * | 2008-12-02 | 2010-06-10 | トヨタ自動車株式会社 | 成膜装置、及び、成膜方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR0165356B1 (ko) | 1995-12-14 | 1998-12-15 | 김광호 | 선택적 텅스텐 질화박막 형성방법 및 이를 이용한 캐패시터 제조방법 |
KR100272523B1 (ko) * | 1998-01-26 | 2000-12-01 | 김영환 | 반도체소자의배선형성방법 |
JP2002009017A (ja) | 2000-06-22 | 2002-01-11 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
US20070009658A1 (en) * | 2001-07-13 | 2007-01-11 | Yoo Jong H | Pulse nucleation enhanced nucleation technique for improved step coverage and better gap fill for WCVD process |
US20100144140A1 (en) | 2008-12-10 | 2010-06-10 | Novellus Systems, Inc. | Methods for depositing tungsten films having low resistivity for gapfill applications |
JP5550843B2 (ja) | 2009-03-19 | 2014-07-16 | ラピスセミコンダクタ株式会社 | 半導体装置の製造方法 |
US8124531B2 (en) * | 2009-08-04 | 2012-02-28 | Novellus Systems, Inc. | Depositing tungsten into high aspect ratio features |
JP5829926B2 (ja) | 2011-07-06 | 2015-12-09 | 東京エレクトロン株式会社 | タングステン膜の成膜方法 |
US20130307032A1 (en) * | 2012-05-16 | 2013-11-21 | Globalfoundries Inc. | Methods of forming conductive contacts for a semiconductor device |
CN105453230B (zh) * | 2013-08-16 | 2019-06-14 | 应用材料公司 | 用六氟化钨(wf6)回蚀进行钨沉积 |
-
2014
- 2014-03-28 JP JP2014069008A patent/JP6297884B2/ja active Active
-
2015
- 2015-03-25 US US14/668,564 patent/US9472454B2/en active Active
- 2015-03-26 TW TW104109665A patent/TWI642140B/zh active
- 2015-03-26 KR KR1020150042116A patent/KR20150112863A/ko active Application Filing
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-
2017
- 2017-02-01 KR KR1020170014437A patent/KR102133625B1/ko active IP Right Grant
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61224313A (ja) * | 1985-03-29 | 1986-10-06 | Hitachi Ltd | 気相薄膜成長方法 |
JPH08241895A (ja) * | 1995-03-03 | 1996-09-17 | Nec Corp | 半導体装置及びその製造方法 |
WO2010064470A1 (ja) * | 2008-12-02 | 2010-06-10 | トヨタ自動車株式会社 | 成膜装置、及び、成膜方法 |
Cited By (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
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JP2019534573A (ja) * | 2016-11-08 | 2019-11-28 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | 自己整合パターニングのための方法 |
JP2020501344A (ja) * | 2016-11-08 | 2020-01-16 | アプライド マテリアルズ インコーポレイテッドApplied Materials,Incorporated | パターニング用途のためのボトムアップ柱状体の形状制御 |
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JP2020527647A (ja) * | 2017-06-23 | 2020-09-10 | メルク パテント ゲゼルシャフト ミット ベシュレンクテル ハフツングMerck Patent Gesellschaft mit beschraenkter Haftung | 選択的な膜成長のための原子層堆積の方法 |
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WO2020054299A1 (ja) * | 2018-09-14 | 2020-03-19 | 株式会社Kokusai Electric | 半導体装置の製造方法、基板処理装置及び記録媒体 |
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KR20200041785A (ko) | 2018-10-12 | 2020-04-22 | 도쿄엘렉트론가부시키가이샤 | 성막 방법 및 기판 처리 시스템 |
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KR20150112863A (ko) | 2015-10-07 |
KR102133625B1 (ko) | 2020-07-13 |
TWI642140B (zh) | 2018-11-21 |
JP6297884B2 (ja) | 2018-03-20 |
CN104947065B (zh) | 2018-04-10 |
US9472454B2 (en) | 2016-10-18 |
US20150279736A1 (en) | 2015-10-01 |
CN104947065A (zh) | 2015-09-30 |
KR20170017963A (ko) | 2017-02-15 |
TW201603189A (zh) | 2016-01-16 |
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