JP2014501045A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2014501045A5 JP2014501045A5 JP2013543143A JP2013543143A JP2014501045A5 JP 2014501045 A5 JP2014501045 A5 JP 2014501045A5 JP 2013543143 A JP2013543143 A JP 2013543143A JP 2013543143 A JP2013543143 A JP 2013543143A JP 2014501045 A5 JP2014501045 A5 JP 2014501045A5
- Authority
- JP
- Japan
- Prior art keywords
- layer
- integrated circuit
- transistor
- deuterium
- pmd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims 26
- 238000002161 passivation Methods 0.000 claims 14
- YZCKVEUIGOORGS-OUBTZVSYSA-N Deuterium Chemical compound [2H] YZCKVEUIGOORGS-OUBTZVSYSA-N 0.000 claims 11
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims 11
- 229910052805 deuterium Inorganic materials 0.000 claims 11
- 229910052739 hydrogen Inorganic materials 0.000 claims 11
- 239000001257 hydrogen Substances 0.000 claims 11
- 239000000758 substrate Substances 0.000 claims 9
- 238000000151 deposition Methods 0.000 claims 7
- 229910004294 SiNxHy Inorganic materials 0.000 claims 6
- AIRCTMFFNKZQPN-UHFFFAOYSA-N AlO Inorganic materials [Al]=O AIRCTMFFNKZQPN-UHFFFAOYSA-N 0.000 claims 3
- 229910017109 AlON Inorganic materials 0.000 claims 3
- 229910004205 SiNX Inorganic materials 0.000 claims 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 3
- 229910052710 silicon Inorganic materials 0.000 claims 3
- 239000010703 silicon Substances 0.000 claims 3
- 238000000137 annealing Methods 0.000 claims 1
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| PCT/US2010/059722 WO2012078163A1 (en) | 2010-12-09 | 2010-12-09 | Hydrogen passivation of integrated circuits |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016196116A Division JP6351079B2 (ja) | 2016-10-04 | 2016-10-04 | 集積回路の水素パッシベーション |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2014501045A JP2014501045A (ja) | 2014-01-16 |
| JP2014501045A5 true JP2014501045A5 (enExample) | 2014-02-27 |
Family
ID=46207422
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013543143A Pending JP2014501045A (ja) | 2010-12-09 | 2010-12-09 | 集積回路の水素パッシベーション |
Country Status (3)
| Country | Link |
|---|---|
| JP (1) | JP2014501045A (enExample) |
| CN (1) | CN103262223A (enExample) |
| WO (1) | WO2012078163A1 (enExample) |
Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102013218494B4 (de) * | 2013-09-16 | 2021-06-02 | Infineon Technologies Ag | Halbleiterbauelement mit einer Passivierungsschicht und Herstellungsverfahren |
| TWI548000B (zh) * | 2014-12-22 | 2016-09-01 | 力晶科技股份有限公司 | 半導體元件及其製作方法 |
| JP6468886B2 (ja) * | 2015-03-02 | 2019-02-13 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法および半導体装置 |
| KR101914039B1 (ko) * | 2017-02-03 | 2018-11-01 | 주식회사 에이치피에스피 | 반도체 열처리방법 |
| TWI858076B (zh) * | 2019-06-17 | 2024-10-11 | 美商應用材料股份有限公司 | 含重氫之膜 |
Family Cites Families (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0845926A (ja) * | 1994-07-26 | 1996-02-16 | Sony Corp | 半導体装置およびその製造方法 |
| JP2002016249A (ja) * | 2000-06-30 | 2002-01-18 | Toshiba Corp | 半導体装置及びその製造方法 |
| US6781184B2 (en) * | 2001-11-29 | 2004-08-24 | Symetrix Corporation | Barrier layers for protecting metal oxides from hydrogen degradation |
| JP2003224206A (ja) * | 2002-01-29 | 2003-08-08 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| JP2007150025A (ja) * | 2005-11-29 | 2007-06-14 | Seiko Epson Corp | 強誘電体メモリの製造方法 |
| EP2032105A2 (en) * | 2006-06-23 | 2009-03-11 | Jentec Inc. | Superthin wound dressing having folded release sheet |
| JP4137161B1 (ja) * | 2007-02-23 | 2008-08-20 | キヤノン株式会社 | 光電変換装置の製造方法 |
| US7985603B2 (en) * | 2008-02-04 | 2011-07-26 | Texas Instruments Incorporated | Ferroelectric capacitor manufacturing process |
| JP5326361B2 (ja) * | 2008-05-28 | 2013-10-30 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
| JP2010093064A (ja) * | 2008-10-08 | 2010-04-22 | Panasonic Corp | 半導体装置及びその製造方法 |
| US8384190B2 (en) * | 2009-03-06 | 2013-02-26 | Texas Instruments Incorporated | Passivation of integrated circuits containing ferroelectric capacitors and hydrogen barriers |
-
2010
- 2010-12-09 WO PCT/US2010/059722 patent/WO2012078163A1/en not_active Ceased
- 2010-12-09 CN CN2010800706081A patent/CN103262223A/zh active Pending
- 2010-12-09 JP JP2013543143A patent/JP2014501045A/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| MY173674A (en) | Passivation stack on a crystalline silicon solar cell | |
| WO2012167141A3 (en) | Metal and silicon containing capping layers for interconnects | |
| WO2012087580A3 (en) | Trap rich layer for semiconductor devices | |
| JP2012083733A5 (ja) | 発光表示装置の作製方法 | |
| TW200729343A (en) | Method for fabricating controlled stress silicon nitride films | |
| JP2014501045A5 (enExample) | ||
| JP2011151379A5 (ja) | トランジスタ | |
| WO2011071937A3 (en) | Method of cleaning and forming a negatively charged passivation layer over a doped region | |
| JP2009010351A5 (enExample) | ||
| EP2575179A3 (en) | Compound semiconductor device and manufacturing method therefor | |
| TW200943477A (en) | Method for manufacturing SOI substrate | |
| WO2012048137A3 (en) | Flexible circuits and methods for making the same | |
| JP2012114148A5 (enExample) | ||
| JP2012146838A5 (enExample) | ||
| WO2007117265A3 (en) | Stably passivated group iv semiconductor nanoparticles and methods and compositions thereof | |
| EP2590233A3 (en) | Photovoltaic device and method of manufacturing the same | |
| WO2009102617A3 (en) | Device having power generating black mask and method of fabricating the same | |
| JP2009049393A5 (enExample) | ||
| EP2575178A3 (en) | Compound semiconductor device and manufacturing method therefor | |
| WO2008093586A1 (ja) | 樹脂封止型半導体装置およびその製造方法 | |
| JP2008160095A5 (enExample) | ||
| WO2011013091A3 (en) | Semiconductor device including a stress buffer material formed above a low-k metallization system | |
| WO2010065457A3 (en) | Method of providing a semiconductor device with a dielectric layer and semiconductor device thereof | |
| WO2008081723A1 (ja) | 絶縁膜の形成方法および半導体装置の製造方法 | |
| EP2230686A3 (en) | Method of manufacturing semiconductor device |