JP2013501345A5 - - Google Patents

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Publication number
JP2013501345A5
JP2013501345A5 JP2012521917A JP2012521917A JP2013501345A5 JP 2013501345 A5 JP2013501345 A5 JP 2013501345A5 JP 2012521917 A JP2012521917 A JP 2012521917A JP 2012521917 A JP2012521917 A JP 2012521917A JP 2013501345 A5 JP2013501345 A5 JP 2013501345A5
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JP
Japan
Prior art keywords
layers
buildup
layer
core
height
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Application number
JP2012521917A
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English (en)
Japanese (ja)
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JP5723363B2 (ja
JP2013501345A (ja
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Priority claimed from US12/533,569 external-priority patent/US20110024898A1/en
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Publication of JP2013501345A publication Critical patent/JP2013501345A/ja
Publication of JP2013501345A5 publication Critical patent/JP2013501345A5/ja
Application granted granted Critical
Publication of JP5723363B2 publication Critical patent/JP5723363B2/ja
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JP2012521917A 2009-07-31 2010-07-28 非対称なビルドアップ層を有する基板を製造する方法 Active JP5723363B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/533,569 US20110024898A1 (en) 2009-07-31 2009-07-31 Method of manufacturing substrates having asymmetric buildup layers
US12/533,569 2009-07-31
PCT/CA2010/001174 WO2011011880A1 (en) 2009-07-31 2010-07-28 A method of manufacturing substrates having asymmetric buildup layers

Publications (3)

Publication Number Publication Date
JP2013501345A JP2013501345A (ja) 2013-01-10
JP2013501345A5 true JP2013501345A5 (enExample) 2013-08-22
JP5723363B2 JP5723363B2 (ja) 2015-05-27

Family

ID=43526212

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012521917A Active JP5723363B2 (ja) 2009-07-31 2010-07-28 非対称なビルドアップ層を有する基板を製造する方法

Country Status (6)

Country Link
US (2) US20110024898A1 (enExample)
EP (1) EP2460393B1 (enExample)
JP (1) JP5723363B2 (enExample)
KR (1) KR101633839B1 (enExample)
CN (1) CN102656955B (enExample)
WO (1) WO2011011880A1 (enExample)

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JP6211510B2 (ja) * 2011-04-08 2017-10-11 コーニンクレッカ フィリップス エヌ ヴェＫｏｎｉｎｋｌｉｊｋｅ Ｐｈｉｌｉｐｓ Ｎ．Ｖ． 画像処理システム及び方法
US8945329B2 (en) * 2011-06-24 2015-02-03 Ibiden Co., Ltd. Printed wiring board and method for manufacturing printed wiring board
JP2013048205A (ja) * 2011-07-25 2013-03-07 Ngk Spark Plug Co Ltd 配線基板の製造方法
US9159649B2 (en) * 2011-12-20 2015-10-13 Intel Corporation Microelectronic package and stacked microelectronic assembly and computing system containing same
US9059179B2 (en) * 2011-12-28 2015-06-16 Broadcom Corporation Semiconductor package with a bridge interposer
US20130181359A1 (en) * 2012-01-13 2013-07-18 TW Semiconductor Manufacturing Company, Ltd. Methods and Apparatus for Thinner Package on Package Structures
JP5941735B2 (ja) 2012-04-10 2016-06-29 新光電気工業株式会社 配線基板の製造方法及び配線基板
KR101921258B1 (ko) 2012-05-09 2018-11-22 삼성전자주식회사 배선 기판 및 이를 포함하는 반도체 패키지
JP2014086651A (ja) * 2012-10-26 2014-05-12 Ibiden Co Ltd プリント配線板及びプリント配線板の製造方法
KR101431911B1 (ko) * 2012-12-06 2014-08-26 삼성전기주식회사 인쇄회로기판 및 그 제조방법
US9299649B2 (en) 2013-02-08 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
US8802504B1 (en) 2013-03-14 2014-08-12 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
KR20150083278A (ko) * 2014-01-09 2015-07-17 삼성전기주식회사 다층기판 및 다층기판의 제조방법
KR102250997B1 (ko) 2014-05-02 2021-05-12 삼성전자주식회사 반도체 패키지
CN104883810B (zh) * 2015-05-15 2018-07-06 江门崇达电路技术有限公司 一种具有密集散热孔的pcb的制作方法
US11277922B2 (en) 2016-10-06 2022-03-15 Advanced Micro Devices, Inc. Circuit board with bridge chiplets
WO2018181857A1 (ja) 2017-03-31 2018-10-04 Ｊｘｔｇエネルギー株式会社 硬化樹脂用組成物、該組成物の硬化物、該組成物および該硬化物の製造方法、ならびに半導体装置
US10510721B2 (en) 2017-08-11 2019-12-17 Advanced Micro Devices, Inc. Molded chip combination
EP3470681B1 (de) * 2017-10-10 2021-09-22 Pfeiffer Vacuum Gmbh Elektrische durchführung für ein vakuumgerät, in der form einer dichtungsplatine
US20190287872A1 (en) 2018-03-19 2019-09-19 Intel Corporation Multi-use package architecture
US10593628B2 (en) 2018-04-24 2020-03-17 Advanced Micro Devices, Inc. Molded die last chip combination
US10672712B2 (en) 2018-07-30 2020-06-02 Advanced Micro Devices, Inc. Multi-RDL structure packages and methods of fabricating the same
US10923430B2 (en) 2019-06-30 2021-02-16 Advanced Micro Devices, Inc. High density cross link die with polymer routing layer
US20230086356A1 (en) * 2021-09-21 2023-03-23 Intel Corporation Glass core substrate including buildups with different numbers of layers

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KR100393271B1 (ko) * 1997-11-19 2003-07-31 이비덴 가부시키가이샤 다층 전자부품탑재용 기판의 제조 방법
JP4128649B2 (ja) * 1998-03-26 2008-07-30 富士通株式会社 薄膜多層回路基板の製造方法
JPH11340610A (ja) * 1998-05-26 1999-12-10 Ibiden Co Ltd スルーホール充填用樹脂組成物及び多層プリント配線板
KR100642167B1 (ko) * 1998-09-18 2006-11-02 훈츠만 어드밴스트 머티리얼스(스위처랜드)게엠베하 다층 회로의 제조방법
JP3577421B2 (ja) * 1999-01-25 2004-10-13 新光電気工業株式会社 半導体装置用パッケージ
WO2000079849A1 (en) * 1999-06-18 2000-12-28 Isola Laminate Systems Corp. High performance ball grid array substrates
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US6720644B2 (en) * 2000-10-10 2004-04-13 Sony Corporation Semiconductor device using interposer substrate and manufacturing method therefor
JP2002290031A (ja) * 2001-03-23 2002-10-04 Ngk Spark Plug Co Ltd 配線基板およびその製造方法
JP4243117B2 (ja) * 2002-08-27 2009-03-25 新光電気工業株式会社 半導体パッケージとその製造方法および半導体装置
US20060289203A1 (en) * 2003-05-19 2006-12-28 Dai Nippon Printing Co., Ltd. Double-sided wiring board, double sided wiring board manufacturing method, and multilayer wiring board
CN1792126A (zh) * 2003-05-19 2006-06-21 大日本印刷株式会社 双面布线基板和双面布线基板的制造方法以及多层布线基板
JP2005159201A (ja) * 2003-11-28 2005-06-16 Ngk Spark Plug Co Ltd 配線基板およびその製造方法
TWI295089B (en) * 2004-12-28 2008-03-21 Ngk Spark Plug Co Wiring substrate and the manufacturing method of the same
US7355283B2 (en) * 2005-04-14 2008-04-08 Sandisk Corporation Rigid wave pattern design on chip carrier substrate and printed circuit board for semiconductor and electronic sub-system packaging
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JP2008098570A (ja) * 2006-10-16 2008-04-24 Sharp Corp 多層プリント配線基板の製造方法
JP5105378B2 (ja) * 2007-12-26 2012-12-26 パナソニック株式会社 半導体装置および多層配線基板

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