JP2013222781A - 半導体装置のデバイス実装構造 - Google Patents

半導体装置のデバイス実装構造 Download PDF

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Publication number
JP2013222781A
JP2013222781A JP2012092575A JP2012092575A JP2013222781A JP 2013222781 A JP2013222781 A JP 2013222781A JP 2012092575 A JP2012092575 A JP 2012092575A JP 2012092575 A JP2012092575 A JP 2012092575A JP 2013222781 A JP2013222781 A JP 2013222781A
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JP
Japan
Prior art keywords
drain
die pad
lead
source
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2012092575A
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English (en)
Japanese (ja)
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JP2013222781A5 (enExample
Inventor
Makoto Ijiri
良 井尻
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP2012092575A priority Critical patent/JP2013222781A/ja
Priority to PCT/JP2013/054757 priority patent/WO2013157300A1/ja
Publication of JP2013222781A publication Critical patent/JP2013222781A/ja
Publication of JP2013222781A5 publication Critical patent/JP2013222781A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/40—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47—FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • H10D30/471—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT]
    • H10D30/475—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs
    • H10D30/4755—High electron mobility transistors [HEMT] or high hole mobility transistors [HHMT] having wider bandgap layer formed on top of lower bandgap active layer, e.g. undoped barrier HEMTs such as i-AlGaN/GaN HEMTs having wide bandgap charge-carrier supplying layers, e.g. modulation doped HEMTs such as n-AlGaAs/GaAs HEMTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/85—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group III-V materials, e.g. GaAs
    • H10D62/8503—Nitride Group III-V materials, e.g. AlN or GaN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/464—Additional interconnections in combination with leadframes
    • H10W70/465—Bumps or wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H10W72/325—Die-attach connectors having a filler embedded in a matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/926—Multiple bond pads having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Junction Field-Effect Transistors (AREA)
JP2012092575A 2012-04-16 2012-04-16 半導体装置のデバイス実装構造 Pending JP2013222781A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2012092575A JP2013222781A (ja) 2012-04-16 2012-04-16 半導体装置のデバイス実装構造
PCT/JP2013/054757 WO2013157300A1 (ja) 2012-04-16 2013-02-25 半導体装置のデバイス実装構造

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2012092575A JP2013222781A (ja) 2012-04-16 2012-04-16 半導体装置のデバイス実装構造

Publications (2)

Publication Number Publication Date
JP2013222781A true JP2013222781A (ja) 2013-10-28
JP2013222781A5 JP2013222781A5 (enExample) 2015-03-05

Family

ID=49383269

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012092575A Pending JP2013222781A (ja) 2012-04-16 2012-04-16 半導体装置のデバイス実装構造

Country Status (2)

Country Link
JP (1) JP2013222781A (enExample)
WO (1) WO2013157300A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021002225A1 (ja) * 2019-07-01 2021-01-07 ローム株式会社 半導体装置
WO2024185473A1 (ja) * 2023-03-03 2024-09-12 ローム株式会社 半導体装置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7097742B2 (ja) * 2018-05-01 2022-07-08 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
CN109300889B (zh) * 2018-10-30 2023-11-24 山东晶导微电子股份有限公司 一种ac-dc芯片与高压续流二极管集成芯片结构及电源模组
CN121311053B (zh) * 2025-12-09 2026-04-03 天津工业大学 一种紧凑型低寄生电感的半桥封装结构

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0465453U (enExample) * 1990-10-16 1992-06-08
JPH10261756A (ja) * 1997-03-19 1998-09-29 Hitachi Ltd 半導体装置およびその製造方法
JP2000341001A (ja) * 1999-05-27 2000-12-08 Denso Corp 高周波切替装置
JP2003347491A (ja) * 2002-05-28 2003-12-05 Renesas Technology Corp 半導体装置
JP2006005005A (ja) * 2004-06-15 2006-01-05 Toshiba Corp 窒素化合物含有半導体装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008166621A (ja) * 2006-12-29 2008-07-17 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP4865829B2 (ja) * 2009-03-31 2012-02-01 シャープ株式会社 半導体装置およびその製造方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0465453U (enExample) * 1990-10-16 1992-06-08
JPH10261756A (ja) * 1997-03-19 1998-09-29 Hitachi Ltd 半導体装置およびその製造方法
JP2000341001A (ja) * 1999-05-27 2000-12-08 Denso Corp 高周波切替装置
JP2003347491A (ja) * 2002-05-28 2003-12-05 Renesas Technology Corp 半導体装置
JP2006005005A (ja) * 2004-06-15 2006-01-05 Toshiba Corp 窒素化合物含有半導体装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021002225A1 (ja) * 2019-07-01 2021-01-07 ローム株式会社 半導体装置
JPWO2021002225A1 (enExample) * 2019-07-01 2021-01-07
JP7562529B2 (ja) 2019-07-01 2024-10-07 ローム株式会社 半導体装置
US12165957B2 (en) 2019-07-01 2024-12-10 Rohm Co., Ltd. Semiconductor device
WO2024185473A1 (ja) * 2023-03-03 2024-09-12 ローム株式会社 半導体装置

Also Published As

Publication number Publication date
WO2013157300A1 (ja) 2013-10-24

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