JP2013201460A - スクライブライン貫通シリコンビア - Google Patents
スクライブライン貫通シリコンビア Download PDFInfo
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- JP2013201460A JP2013201460A JP2013137819A JP2013137819A JP2013201460A JP 2013201460 A JP2013201460 A JP 2013201460A JP 2013137819 A JP2013137819 A JP 2013137819A JP 2013137819 A JP2013137819 A JP 2013137819A JP 2013201460 A JP2013201460 A JP 2013201460A
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- wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/11001—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate
- H01L2224/11009—Involving a temporary auxiliary member not forming part of the manufacturing apparatus, e.g. removable or sacrificial coating, film or substrate for protecting parts during manufacture
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
Abstract
【解決手段】半導体ウェーハは、その半導体ウェーハからスコーリングされるダイを含む。また、半導体ウェーハは、ダイの間にスクライブラインを含む。各スクライブラインは複数の貫通シリコンビアを含む。
【選択図】図2
Description
202 ダイ
204 スクライブライン
206 貫通シリコンビア
Claims (8)
- スクライブラインを有するアクティブウェーハを介して液体をキャリヤウェーハに輸送する方法であって、
前記アクティブウェーハのスクライブライン内に貫通シリコンビアを形成するステップと、
前記アクティブウェーハに前記液体を適用するステップとを備え、
前記貫通シリコンビアが、該貫通シリコンビアを介して前記液体を流すように構成される、方法。 - 前記液体を適用するステップが、前記アクティブウェーハにエッチング溶液を適用するステップを備える、請求項1に記載の方法。
- 前記キャリヤウェーハを前記アクティブウェーハに接着している接着剤を溶かして、前記キャリヤウェーハを前記アクティブウェーハからリリースするステップを更に備えた請求項2に記載の方法。
- 溶液を適用する前に前記アクティブウェーハを薄化して前記貫通シリコンビアを露出するステップを更に備えた請求項1に記載の方法。
- 前記アクティブウェーハ上に誘電体を堆積させるステップを更に備えた請求項4に記載の方法。
- 複数のダイを有する半導体ウェーハであって、
個々のダイを分離する手段と、
前記個々のダイを分離する手段内に含まれる半導体ウェーハを介して液体を流す手段とを備えた半導体ウェーハ。 - 前記液体を流す手段が、前記半導体ウェーハを介してエッチング溶液を流す手段を備える、請求項6に記載の半導体ウェーハ。
- 前記液体を流す手段が、貫通シリコンビアを備える、請求項7に記載の半導体ウェーハ。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/366,846 US20100200957A1 (en) | 2009-02-06 | 2009-02-06 | Scribe-Line Through Silicon Vias |
US12/366,846 | 2009-02-06 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011548433A Division JP2012517111A (ja) | 2009-02-06 | 2010-02-05 | スクライブライン貫通シリコンビア |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2013201460A true JP2013201460A (ja) | 2013-10-03 |
JP6049555B2 JP6049555B2 (ja) | 2016-12-21 |
Family
ID=42103986
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011548433A Pending JP2012517111A (ja) | 2009-02-06 | 2010-02-05 | スクライブライン貫通シリコンビア |
JP2013137819A Expired - Fee Related JP6049555B2 (ja) | 2009-02-06 | 2013-07-01 | スクライブライン貫通シリコンビア |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011548433A Pending JP2012517111A (ja) | 2009-02-06 | 2010-02-05 | スクライブライン貫通シリコンビア |
Country Status (7)
Country | Link |
---|---|
US (1) | US20100200957A1 (ja) |
EP (1) | EP2394297A2 (ja) |
JP (2) | JP2012517111A (ja) |
KR (2) | KR101426778B1 (ja) |
CN (1) | CN102301466A (ja) |
TW (1) | TW201115684A (ja) |
WO (1) | WO2010091245A2 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI497677B (zh) * | 2011-11-08 | 2015-08-21 | Inotera Memories Inc | 具有側邊矽貫通電極之半導體結構與其形成方法 |
JP6324743B2 (ja) * | 2014-01-31 | 2018-05-16 | 住友電工デバイス・イノベーション株式会社 | 半導体装置の製造方法 |
US9431321B2 (en) | 2014-03-10 | 2016-08-30 | Kabushiki Kaisha Toshiba | Method of manufacturing a semiconductor device and semiconductor integrated circuit wafer |
TWI585843B (zh) * | 2015-11-30 | 2017-06-01 | Semiconductor wafers and their cutting methods | |
CN106252304A (zh) * | 2016-08-31 | 2016-12-21 | 华天科技(西安)有限公司 | 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件 |
CN106252305A (zh) * | 2016-08-31 | 2016-12-21 | 华天科技(西安)有限公司 | 一种先刻槽再打孔的裸芯塑封超薄指纹识别系统级封装件 |
CN106252306A (zh) * | 2016-08-31 | 2016-12-21 | 华天科技(西安)有限公司 | 一种采用硅通孔及裸芯塑封的超薄指纹识别系统级封装件 |
JP6384934B2 (ja) * | 2017-06-20 | 2018-09-05 | 住友電工デバイス・イノベーション株式会社 | 半導体装置の製造方法 |
KR102333452B1 (ko) | 2017-09-28 | 2021-12-03 | 삼성전자주식회사 | 반도체 소자 및 그 제조방법 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008244132A (ja) * | 2007-03-27 | 2008-10-09 | Sanyo Electric Co Ltd | 半導体装置の製造方法および半導体装置 |
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US4984358A (en) * | 1989-03-10 | 1991-01-15 | Microelectronics And Computer Technology Corporation | Method of assembling stacks of integrated circuit dies |
US5641416A (en) * | 1995-10-25 | 1997-06-24 | Micron Display Technology, Inc. | Method for particulate-free energy beam cutting of a wafer of die assemblies |
US5888884A (en) * | 1998-01-02 | 1999-03-30 | General Electric Company | Electronic device pad relocation, precision placement, and packaging in arrays |
JP3556503B2 (ja) * | 1999-01-20 | 2004-08-18 | 沖電気工業株式会社 | 樹脂封止型半導体装置の製造方法 |
JP2000243900A (ja) * | 1999-02-23 | 2000-09-08 | Rohm Co Ltd | 半導体チップおよびそれを用いた半導体装置、ならびに半導体チップの製造方法 |
JP2003100936A (ja) | 2001-09-20 | 2003-04-04 | Hitachi Ltd | 半導体装置の製造方法 |
US6596562B1 (en) * | 2002-01-03 | 2003-07-22 | Intel Corporation | Semiconductor wafer singulation method |
JP4136684B2 (ja) * | 2003-01-29 | 2008-08-20 | Necエレクトロニクス株式会社 | 半導体装置及びそのダミーパターンの配置方法 |
JP2005191550A (ja) * | 2003-12-01 | 2005-07-14 | Tokyo Ohka Kogyo Co Ltd | 基板の貼り付け方法 |
US7772605B2 (en) * | 2004-03-19 | 2010-08-10 | Showa Denko K.K. | Compound semiconductor light-emitting device |
US7211500B2 (en) * | 2004-09-27 | 2007-05-01 | United Microelectronics Corp. | Pre-process before cutting a wafer and method of cutting a wafer |
US7265034B2 (en) * | 2005-02-18 | 2007-09-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of cutting integrated circuit chips from wafer by ablating with laser and cutting with saw blade |
US7394148B2 (en) * | 2005-06-20 | 2008-07-01 | Stats Chippac Ltd. | Module having stacked chip scale semiconductor packages |
TWI324800B (en) * | 2005-12-28 | 2010-05-11 | Sanyo Electric Co | Method for manufacturing semiconductor device |
JP2007180395A (ja) * | 2005-12-28 | 2007-07-12 | Sanyo Electric Co Ltd | 半導体装置の製造方法 |
KR100837269B1 (ko) * | 2006-05-22 | 2008-06-11 | 삼성전자주식회사 | 웨이퍼 레벨 패키지 및 그 제조 방법 |
KR100772016B1 (ko) * | 2006-07-12 | 2007-10-31 | 삼성전자주식회사 | 반도체 칩 및 그 형성 방법 |
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JP2009260008A (ja) * | 2008-04-16 | 2009-11-05 | Nikon Corp | 半導体装置製造装置および半導体装置の製造方法 |
-
2009
- 2009-02-06 US US12/366,846 patent/US20100200957A1/en not_active Abandoned
-
2010
- 2010-02-05 JP JP2011548433A patent/JP2012517111A/ja active Pending
- 2010-02-05 CN CN2010800060816A patent/CN102301466A/zh active Pending
- 2010-02-05 EP EP10704278A patent/EP2394297A2/en not_active Withdrawn
- 2010-02-05 WO PCT/US2010/023309 patent/WO2010091245A2/en active Application Filing
- 2010-02-05 KR KR1020137027064A patent/KR101426778B1/ko not_active IP Right Cessation
- 2010-02-05 KR KR1020117020814A patent/KR20110124281A/ko active Application Filing
- 2010-02-06 TW TW099103665A patent/TW201115684A/zh unknown
-
2013
- 2013-07-01 JP JP2013137819A patent/JP6049555B2/ja not_active Expired - Fee Related
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008244132A (ja) * | 2007-03-27 | 2008-10-09 | Sanyo Electric Co Ltd | 半導体装置の製造方法および半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
EP2394297A2 (en) | 2011-12-14 |
KR20110124281A (ko) | 2011-11-16 |
JP2012517111A (ja) | 2012-07-26 |
KR20130122020A (ko) | 2013-11-06 |
JP6049555B2 (ja) | 2016-12-21 |
CN102301466A (zh) | 2011-12-28 |
TW201115684A (en) | 2011-05-01 |
WO2010091245A8 (en) | 2010-11-25 |
US20100200957A1 (en) | 2010-08-12 |
KR101426778B1 (ko) | 2014-08-05 |
WO2010091245A3 (en) | 2010-10-07 |
WO2010091245A2 (en) | 2010-08-12 |
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