JP2013073962A - 化合物半導体装置及びその製造方法 - Google Patents
化合物半導体装置及びその製造方法 Download PDFInfo
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Abstract
【解決手段】化合物半導体装置の一態様には、基板1と、基板1の上方に形成された化合物半導体積層構造8と、基板1と化合物半導体積層構造8との間に形成された非晶質性絶縁膜2と、が設けられている。
【選択図】図2
Description
先ず、第1の実施形態について説明する。図2は、第1の実施形態に係るGaN系HEMT(化合物半導体装置)の構造を示す断面図である。
次に、第2の実施形態について説明する。図4は、第2の実施形態に係るGaN系HEMT(化合物半導体装置)の構造を示す断面図である。
次に、第3の実施形態について説明する。図5は、第3の実施形態に係るGaN系HEMT(化合物半導体装置)の構造を示す断面図である。
第4の実施形態は、GaN系HEMTを含む化合物半導体装置のディスクリートパッケージに関する。図6は、第4の実施形態に係るディスクリートパッケージを示す図である。
次に、第5の実施形態について説明する。第5の実施形態は、GaN系HEMTを含む化合物半導体装置を備えたPFC(Power Factor Correction)回路に関する。図7は、第5の実施形態に係るPFC回路を示す結線図である。
次に、第6の実施形態について説明する。第6の実施形態は、GaN系HEMTを含む化合物半導体装置を備えた電源装置に関する。図8は、第6の実施形態に係る電源装置を示す結線図である。
次に、第7の実施形態について説明する。第7の実施形態は、GaN系HEMTを含む化合物半導体装置を備えた高周波増幅器に関する。図9は、第7の実施形態に係る高周波増幅器を示す結線図である。
基板と、
前記基板の上方に形成された化合物半導体積層構造と、
前記基板と前記化合物半導体積層構造との間に形成された非晶質性絶縁膜と、
を有することを特徴とする化合物半導体装置。
前記非晶質性絶縁膜は非晶質炭素膜であることを特徴とする付記1に記載の化合物半導体装置。
前記非晶質性絶縁膜における炭素間結合の割合がsp3/sp2比で65%以上であることを特徴とする付記2に記載の化合物半導体装置。
前記非晶質性絶縁膜の厚さが1nm以上であることを特徴とする付記1乃至3のいずれか1項に記載の化合物半導体装置。
前記非晶質性絶縁膜の厚さが2nm以下であることを特徴とする付記1乃至4のいずれか1項に記載の化合物半導体装置。
前記化合物半導体積層構造は、前記非晶質性絶縁膜上に形成されたバッファ層を有することを特徴とする付記1乃至5のいずれか1項に記載の化合物半導体装置。
前記基板がSiを含有し、
前記バッファ層がAlを含有することを特徴とする付記6に記載の化合物半導体装置。
前記バッファ層がAlN層であることを特徴とする付記7に記載の化合物半導体装置。
前記化合物半導体積層構造は、
前記バッファ層の上方に形成された電子走行層と、
前記電子走行層の上方に形成された電子供給層と、
を有することを特徴とする付記6乃至8のいずれか1項に記載の化合物半導体装置。
前記電子供給層の上方に形成されたゲート電極、ソース電極及びドレイン電極を有することを特徴とする付記9に記載の化合物半導体装置。
付記1乃至10のいずれか1項に記載の化合物半導体装置を有することを特徴とする電源装置。
付記1乃至10のいずれか1項に記載の化合物半導体装置を有することを特徴とする高出力増幅器。
基板の上方に非晶質性絶縁膜を形成する工程と、
前記非晶質性絶縁膜の上方に化合物半導体積層構造を形成する工程と、
を有することを特徴とする化合物半導体装置の製造方法。
前記非晶質性絶縁膜として非晶質炭素膜を形成することを特徴とする付記13に記載の化合物半導体装置の製造方法。
前記非晶質性絶縁膜をFCA法により形成することを特徴とする付記13又は14に記載の化合物半導体装置の製造方法。
前記化合物半導体積層構造を形成する工程は、前記非晶質性絶縁膜上にバッファ層を形成する工程を有することを特徴とする付記13乃至15のいずれか1項に記載の化合物半導体装置の製造方法。
前記基板がSiを含有し、
前記バッファ層がAlを含有することを特徴とする付記16に記載の化合物半導体装置の製造方法。
前記バッファ層がAlN層であることを特徴とする付記17に記載の化合物半導体装置の製造方法。
前記化合物半導体積層構造を形成する工程は、
前記バッファ層の上方に電子走行層を形成する工程と、
前記電子走行層の上方に電子供給層を形成する工程と、
を有することを特徴とする付記16乃至18のいずれか1項に記載の化合物半導体装置の製造方法。
前記電子供給層の上方にゲート電極、ソース電極及びドレイン電極を形成する工程を有することを特徴とする付記19に記載の化合物半導体装置の製造方法。
2:非晶質性絶縁膜
3:バッファ層
4:電子走行層
5:スペーサ層
6:電子供給層
7:キャップ層
8:化合物半導体積層構造
11g:ゲート電極
11s:ソース電極
11d:ドレイン電極
Claims (10)
- 基板と、
前記基板の上方に形成された化合物半導体積層構造と、
前記基板と前記化合物半導体積層構造との間に形成された非晶質性絶縁膜と、
を有することを特徴とする化合物半導体装置。 - 前記非晶質性絶縁膜は非晶質炭素膜であることを特徴とする請求項1に記載の化合物半導体装置。
- 前記非晶質性絶縁膜における炭素間結合の割合がsp3/sp2比で65%以上であることを特徴とする請求項2に記載の化合物半導体装置。
- 前記化合物半導体積層構造は、前記非晶質性絶縁膜上に形成されたバッファ層を有することを特徴とする請求項1乃至3のいずれか1項に記載の化合物半導体装置。
- 前記基板がSiを含有し、
前記バッファ層がAlを含有することを特徴とする請求項4に記載の化合物半導体装置。 - 前記化合物半導体積層構造は、
前記バッファ層の上方に形成された電子走行層と、
前記電子走行層の上方に形成された電子供給層と、
を有することを特徴とする請求項4又は5に記載の化合物半導体装置。 - 前記電子供給層の上方に形成されたゲート電極、ソース電極及びドレイン電極を有することを特徴とする請求項6に記載の化合物半導体装置。
- 請求項1乃至7のいずれか1項に記載の化合物半導体装置を有することを特徴とする電源装置。
- 請求項1乃至7のいずれか1項に記載の化合物半導体装置を有することを特徴とする高出力増幅器。
- 基板の上方に非晶質性絶縁膜を形成する工程と、
前記非晶質性絶縁膜の上方に化合物半導体積層構造を形成する工程と、
を有することを特徴とする化合物半導体装置の製造方法。
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