JP2013016790A - 半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法 - Google Patents

半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法 Download PDF

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Publication number
JP2013016790A
JP2013016790A JP2012130653A JP2012130653A JP2013016790A JP 2013016790 A JP2013016790 A JP 2013016790A JP 2012130653 A JP2012130653 A JP 2012130653A JP 2012130653 A JP2012130653 A JP 2012130653A JP 2013016790 A JP2013016790 A JP 2013016790A
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Japan
Prior art keywords
semiconductor crystal
crystal layer
semiconductor
layer
base substrate
Prior art date
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Pending
Application number
JP2012130653A
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English (en)
Japanese (ja)
Inventor
Masahiko Hata
雅彦 秦
Hisashi Yamada
永 山田
Masashi Yokoyama
正史 横山
Sang Hyun Kim
相賢 金
Mitsuru Takenaka
充 竹中
Shinichi Takagi
信一 高木
Tetsuji Yasuda
哲二 安田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Sumitomo Chemical Co Ltd
University of Tokyo NUC
Original Assignee
National Institute of Advanced Industrial Science and Technology AIST
Sumitomo Chemical Co Ltd
University of Tokyo NUC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by National Institute of Advanced Industrial Science and Technology AIST, Sumitomo Chemical Co Ltd, University of Tokyo NUC filed Critical National Institute of Advanced Industrial Science and Technology AIST
Priority to JP2012130653A priority Critical patent/JP2013016790A/ja
Publication of JP2013016790A publication Critical patent/JP2013016790A/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/8258Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using a combination of technologies covered by H01L21/8206, H01L21/8213, H01L21/822, H01L21/8252, H01L21/8254 or H01L21/8256
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • H01L27/1207Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI combined with devices in contact with the semiconductor body, i.e. bulk/SOI hybrid circuits

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Thin Film Transistor (AREA)
JP2012130653A 2011-06-10 2012-06-08 半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法 Pending JP2013016790A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2012130653A JP2013016790A (ja) 2011-06-10 2012-06-08 半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2011130728 2011-06-10
JP2011130728 2011-06-10
JP2012130653A JP2013016790A (ja) 2011-06-10 2012-06-08 半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法

Publications (1)

Publication Number Publication Date
JP2013016790A true JP2013016790A (ja) 2013-01-24

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JP2012130653A Pending JP2013016790A (ja) 2011-06-10 2012-06-08 半導体デバイス、半導体基板、半導体基板の製造方法および半導体デバイスの製造方法

Country Status (3)

Country Link
JP (1) JP2013016790A (zh)
TW (1) TW201310580A (zh)
WO (1) WO2012169210A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9064959B2 (en) * 2013-03-13 2015-06-23 Taiwan Semiconductor Manufacturing Company, Ltd. Method and apparatus for forming a CMOS device

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59198750A (ja) * 1983-04-25 1984-11-10 Seiko Epson Corp 半導体装置
JPS63311768A (ja) * 1987-06-13 1988-12-20 Fujitsu Ltd 相補型半導体装置の製造方法
JP2830144B2 (ja) * 1989-08-28 1998-12-02 日本電気株式会社 半導体装置
JPH03109740A (ja) * 1989-09-25 1991-05-09 Hitachi Ltd 半導体装置
US6563143B2 (en) * 1999-07-29 2003-05-13 Stmicroelectronics, Inc. CMOS circuit of GaAs/Ge on Si substrate
JP4116990B2 (ja) * 2004-09-28 2008-07-09 富士通株式会社 電界効果型トランジスタおよびその製造方法
JP4940682B2 (ja) * 2005-09-09 2012-05-30 富士通セミコンダクター株式会社 電界効果トランジスタおよびその製造方法

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TW201310580A (zh) 2013-03-01

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