JP2012234908A - 炭化珪素半導体装置 - Google Patents
炭化珪素半導体装置 Download PDFInfo
- Publication number
- JP2012234908A JP2012234908A JP2011101207A JP2011101207A JP2012234908A JP 2012234908 A JP2012234908 A JP 2012234908A JP 2011101207 A JP2011101207 A JP 2011101207A JP 2011101207 A JP2011101207 A JP 2011101207A JP 2012234908 A JP2012234908 A JP 2012234908A
- Authority
- JP
- Japan
- Prior art keywords
- trench
- type
- gate
- oxide film
- longitudinal direction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 48
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims description 58
- 229910010271 silicon carbide Inorganic materials 0.000 title claims description 58
- 239000000758 substrate Substances 0.000 claims abstract description 56
- 230000015572 biosynthetic process Effects 0.000 abstract description 8
- 230000007423 decrease Effects 0.000 abstract description 8
- 238000002955 isolation Methods 0.000 abstract 2
- 239000010410 layer Substances 0.000 description 66
- 239000012535 impurity Substances 0.000 description 25
- 238000000034 method Methods 0.000 description 13
- 238000005530 etching Methods 0.000 description 12
- 230000004913 activation Effects 0.000 description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 8
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 8
- 229910052782 aluminium Inorganic materials 0.000 description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 8
- 229910052796 boron Inorganic materials 0.000 description 8
- 230000005684 electric field Effects 0.000 description 8
- 238000004519 manufacturing process Methods 0.000 description 8
- 238000005468 ion implantation Methods 0.000 description 7
- 238000000137 annealing Methods 0.000 description 6
- 238000010586 diagram Methods 0.000 description 5
- 239000011229 interlayer Substances 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 5
- 238000007254 oxidation reaction Methods 0.000 description 5
- 239000002344 surface layer Substances 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- 238000000059 patterning Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 239000007772 electrode material Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000001698 pyrogenic effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/04—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes
- H01L29/045—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes by their particular orientation of crystalline planes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
- H01L29/1608—Silicon carbide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
【解決手段】SiC半導体基板のオフ方向である<11−20>方向に対して垂直な方向である<1−100>方向を長手方向としてトレンチ6を形成する。これにより、ステップバンチングSBがトレンチ6を横切らないようにでき、トレンチ6の側面や底面にステップバンチングSBによる凹凸がほぼ形成されないようにできる。したがって、トレンチ6の側壁および底面上に形成されるゲート酸化膜8についても、凹凸が無い面上に形成されることになり、ゲート酸化膜8の絶縁耐圧、寿命の低下を抑制することが可能となる。
【選択図】図3
Description
また、請求項5に記載したように、主表面をC面とし、オフ方向を<1−100>方向、トレンチ(6)の長手方向を<11−20>方向とすることもできる。
本発明の第1実施形態について説明する。ここではSiC半導体装置に備えられる素子として反転型のトレンチゲート構造のMOSFETについて説明する。
まず、窒素等のn型不純物濃度が例えば1.0×1019/cm3で厚さ300μm程度のn+型基板1を用意する。このn+型基板1の表面に窒素等のn型不純物濃度が例えば3.0×1015〜2.0×1016/cm3で厚さ15μm程度のSiCからなるn-型ドリフト層2をエピタキシャル成長させる。
n-型ドリフト層2の表面にLTOなどで構成されるマスク20を形成したのち、フォトリソグラフィ工程を経て、p型ディープ層10の形成予定領域においてマスク20を開口させる。そして、マスク20上からp型不純物(例えばボロンやアルミニウム)のイオン注入および活性化を行うことで、p型ディープ層10を形成する。例えばボロンもしくはアルミニウム濃度が1.0×1016〜1.0×1019/cm3となるようにイオン注入を行っている。
p型ディープ層10およびn-型ドリフト層2の表面に、ボロンもしくはアルミニウム等のp型不純物濃度が例えば1.0×1015〜2.0×1019/cm3、厚さ2.0μm程度となるp型不純物層をエピタキシャル成長させることにより、p型ベース領域3を形成する。
続いて、p型ベース領域3の上に、例えばLTO等で構成されるマスク(図示せず)を成膜したのち、フォトリソグラフィ工程を経て、n+型ソース領域4の形成予定領域上においてマスクを開口させる。その後、n型不純物(例えば窒素)をイオン注入する。
p型ベース領域3、n+型ソース領域4およびp+型コンタクト層5の上に、エッチングマスクとなる酸化膜21を成膜したのち、トレンチ6の形成予定領域において酸化膜21を開口させる。そして、酸化膜21をエッチングマスクとして用いたエッチングを行ったのち、必要に応じて犠牲酸化工程を行うことで、トレンチ6を形成する。この後、エッチングマスクとして用いた酸化膜21を除去する。
ゲート酸化膜形成工程を行うことにより、トレンチ6内を含む基板表面全面にゲート酸化膜8を形成する。具体的には、ウェット雰囲気を用いたパイロジェニック法によるゲート酸化(熱酸化)によりゲート酸化膜8を形成する。続いて、ゲート酸化膜8の表面にn型不純物をドーピングしたポリシリコン層を例えば600℃の温度下で440nm程度成膜したのち、エッチバック工程等を行うことにより、トレンチ6内にゲート酸化膜8およびゲート電極9を残す。
本発明の第2実施形態について説明する。本実施形態は、第1実施形態に対してオフ方向とトレンチ6の長手方向を変更したものであり、その他に関しては第1実施形態と同様であるため、第1実施形態と異なる部分についてのみ説明する。
(1)上記第1、第2実施形態では、Si面のSiC半導体基板を用いる場合において、オフ方向を<11−20>方向、トレンチ6の長手方向を<1−100>方向とする場合と、オフ方向を<1−100>方向、トレンチ6の長手方向を<11−20>方向とする場合について説明した。しかしながら、これらは単なる一例を示したに過ぎず、基本的にはオフ方向とトレンチ6の長手方向とが垂直になるようにトレンチ6を形成すれば良い。また、Si面ではなくC面のSiC半導体基板を用いる場合にも、同様の構成とすることができる。例えば、C面のSiC半導体基板を用いる場合において、オフ方向を<11−20>方向、トレンチ6の長手方向を<1−100>方向とすることもできるし、オフ方向を<1−100>方向、トレンチ6の長手方向を<11−20>方向とすることもできる。SiC半導体基板1、2としてオフ基板が用いられていることから、トレンチ6を形成したときに、その側面が目標とする面からオフ角分ずれることになり、チャネル移動度の低下に繋がる。しかしながら、C面を主表面とする場合には、オフ角分ずれたときのチャネル移動度の低下率がSi面を主表面とする場合と比較して小さくできる。このため、主表面をC面とするSiC半導体基板を用いると、よりチャネル移動度の低下を抑制することが可能となる。
2 n-型ドリフト層
3 p型ベース領域
4 n+型ソース領域
5 p+型コンタクト層
6 トレンチ
8 ゲート酸化膜
9 ゲート電極
10 p型ディープ層
11 ソース電極
12 層間絶縁膜
13 ドレイン電極
20 マスク
21 酸化膜
22 レジスト
Claims (5)
- 第1または第2導電型層の上に第1導電型のドリフト層(2)を備え、主表面がオフ角を有する炭化珪素半導体基板(1、2)に形成され、前記炭化珪素半導体基板(1、2)における前記ドリフト層(2)の表面に形成された一方向を長手方向とするトレンチ(6)の両側面をチャネル形成面として、前記トレンチ(6)内にゲート絶縁膜(8)を介して形成されたゲート電極(9)に対するゲート電圧の印加に基づいて前記トレンチ(6)の側面を通じて電流を流すように構成されたトレンチゲート構造の縦型半導体素子を有する炭化珪素半導体装置であって、
前記炭化珪素半導体基板(1)のオフ方向に対する垂直方向が前記トレンチ(6)の長手方向とされていることを特徴とする炭化珪素半導体装置。 - 前記主表面がSi面とされ、前記オフ方向は<11−20>方向とされていると共に、前記トレンチ(6)の長手方向が<1−100>方向とされていることを特徴とする請求項1に記載の炭化珪素半導体装置。
- 前記主表面がSi面とされ、前記オフ方向は<1−100>方向とされていると共に、前記トレンチ(6)の長手方向が<11−20>方向とされていることを特徴とする請求項1に記載の炭化珪素半導体装置。
- 前記主表面がC面とされ、前記オフ方向は<11−20>方向とされていると共に、前記トレンチ(6)の長手方向が<1−100>方向とされていることを特徴とする請求項1に記載の炭化珪素半導体装置。
- 前記主表面がC面とされ、前記オフ方向は<1−100>方向とされていると共に、前記トレンチ(6)の長手方向が<11−20>方向とされていることを特徴とする請求項1に記載の炭化珪素半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011101207A JP5817204B2 (ja) | 2011-04-28 | 2011-04-28 | 炭化珪素半導体装置 |
DE102012205879.6A DE102012205879B4 (de) | 2011-04-28 | 2012-04-11 | Siliciumcarbid-Halbleitervorrichtung |
US13/450,639 US8525223B2 (en) | 2011-04-28 | 2012-04-19 | Silicon carbide semiconductor device |
CN201210128717.5A CN102760768B (zh) | 2011-04-28 | 2012-04-27 | 碳化硅半导体器件 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2011101207A JP5817204B2 (ja) | 2011-04-28 | 2011-04-28 | 炭化珪素半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012234908A true JP2012234908A (ja) | 2012-11-29 |
JP5817204B2 JP5817204B2 (ja) | 2015-11-18 |
Family
ID=47007863
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011101207A Active JP5817204B2 (ja) | 2011-04-28 | 2011-04-28 | 炭化珪素半導体装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US8525223B2 (ja) |
JP (1) | JP5817204B2 (ja) |
CN (1) | CN102760768B (ja) |
DE (1) | DE102012205879B4 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016082099A (ja) * | 2014-10-17 | 2016-05-16 | トヨタ自動車株式会社 | トレンチゲート電極を有する絶縁ゲート型スイッチング素子の製造方法 |
WO2016194280A1 (ja) * | 2015-05-29 | 2016-12-08 | 株式会社デンソー | 半導体装置およびその製造方法 |
JP2017135424A (ja) * | 2013-02-05 | 2017-08-03 | 三菱電機株式会社 | 絶縁ゲート型炭化珪素半導体装置及びその製造方法 |
US10418477B2 (en) | 2016-12-28 | 2019-09-17 | Fuji Electric Co., Ltd. | Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN111129109A (zh) * | 2019-12-04 | 2020-05-08 | 深圳第三代半导体研究院 | 一种碳化硅高压mos器件及其制造方法 |
CN111276545B (zh) * | 2020-02-12 | 2023-03-14 | 重庆伟特森电子科技有限公司 | 一种新型沟槽碳化硅晶体管器件及其制作方法 |
US11563101B2 (en) * | 2020-07-07 | 2023-01-24 | Wolfspeed, Inc. | Power semiconductor devices having multilayer gate dielectric layers that include an etch stop/field control layer and methods of forming such devices |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005183943A (ja) * | 2003-11-25 | 2005-07-07 | Matsushita Electric Ind Co Ltd | 半導体素子 |
JP2010258385A (ja) * | 2009-04-28 | 2010-11-11 | Fuji Electric Systems Co Ltd | 炭化珪素半導体装置およびその製造方法 |
US20110017998A1 (en) * | 2009-07-21 | 2011-01-27 | Rohm Co., Ltd. | Semiconductor device |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5736753A (en) * | 1994-09-12 | 1998-04-07 | Hitachi, Ltd. | Semiconductor device for improved power conversion having a hexagonal-system single-crystal silicon carbide |
JP2000294777A (ja) | 1999-04-08 | 2000-10-20 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP2003303967A (ja) * | 2002-04-09 | 2003-10-24 | Shindengen Electric Mfg Co Ltd | 半導体装置およびその製造方法 |
JP4110875B2 (ja) * | 2002-08-09 | 2008-07-02 | 株式会社デンソー | 炭化珪素半導体装置 |
US7652326B2 (en) * | 2003-05-20 | 2010-01-26 | Fairchild Semiconductor Corporation | Power semiconductor devices and methods of manufacture |
JP4194890B2 (ja) * | 2003-06-24 | 2008-12-10 | 株式会社豊田中央研究所 | 半導体装置とその製造方法 |
US6906356B1 (en) * | 2004-09-27 | 2005-06-14 | Rockwell Scientific Licensing, Llc | High voltage switch |
US7135740B2 (en) * | 2004-09-27 | 2006-11-14 | Teledyne Licensing, Llc | High voltage FET switch with conductivity modulation |
JP4899405B2 (ja) * | 2004-11-08 | 2012-03-21 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
US20070012983A1 (en) * | 2005-07-15 | 2007-01-18 | Yang Robert K | Terminations for semiconductor devices with floating vertical series capacitive structures |
US7633120B2 (en) * | 2006-08-08 | 2009-12-15 | Alph & Omega Semiconductor, Ltd. | Inverted-trench grounded-source field effect transistor (FET) structure using highly conductive substrates |
JP5509520B2 (ja) | 2006-12-21 | 2014-06-04 | 富士電機株式会社 | 炭化珪素半導体装置の製造方法 |
JP5135885B2 (ja) | 2007-05-24 | 2013-02-06 | 富士電機株式会社 | 炭化珪素半導体装置の製造方法 |
US7820534B2 (en) | 2007-08-10 | 2010-10-26 | Mitsubishi Electric Corporation | Method of manufacturing silicon carbide semiconductor device |
JP4412411B2 (ja) | 2007-08-10 | 2010-02-10 | 三菱電機株式会社 | 炭化珪素半導体装置の製造方法 |
JP4640436B2 (ja) * | 2008-04-14 | 2011-03-02 | 株式会社デンソー | 炭化珪素半導体装置の製造方法 |
JP5589263B2 (ja) | 2008-05-29 | 2014-09-17 | 富士電機株式会社 | 炭化珪素半導体基板のトレンチ形成方法 |
JP2010184833A (ja) * | 2009-02-12 | 2010-08-26 | Denso Corp | 炭化珪素単結晶基板および炭化珪素単結晶エピタキシャルウェハ |
JP5510309B2 (ja) * | 2010-12-22 | 2014-06-04 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
JP2012146921A (ja) * | 2011-01-14 | 2012-08-02 | Denso Corp | 炭化珪素半導体装置 |
-
2011
- 2011-04-28 JP JP2011101207A patent/JP5817204B2/ja active Active
-
2012
- 2012-04-11 DE DE102012205879.6A patent/DE102012205879B4/de not_active Expired - Fee Related
- 2012-04-19 US US13/450,639 patent/US8525223B2/en active Active
- 2012-04-27 CN CN201210128717.5A patent/CN102760768B/zh not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005183943A (ja) * | 2003-11-25 | 2005-07-07 | Matsushita Electric Ind Co Ltd | 半導体素子 |
JP2010258385A (ja) * | 2009-04-28 | 2010-11-11 | Fuji Electric Systems Co Ltd | 炭化珪素半導体装置およびその製造方法 |
US20110017998A1 (en) * | 2009-07-21 | 2011-01-27 | Rohm Co., Ltd. | Semiconductor device |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2017135424A (ja) * | 2013-02-05 | 2017-08-03 | 三菱電機株式会社 | 絶縁ゲート型炭化珪素半導体装置及びその製造方法 |
CN109755321A (zh) * | 2013-02-05 | 2019-05-14 | 三菱电机株式会社 | 绝缘栅型碳化硅半导体装置及其制造方法 |
US10510843B2 (en) | 2013-02-05 | 2019-12-17 | Mitsubishi Electric Corporation | Insulated gate silicon carbide semiconductor device and method for manufacturing same |
JP2016082099A (ja) * | 2014-10-17 | 2016-05-16 | トヨタ自動車株式会社 | トレンチゲート電極を有する絶縁ゲート型スイッチング素子の製造方法 |
WO2016194280A1 (ja) * | 2015-05-29 | 2016-12-08 | 株式会社デンソー | 半導体装置およびその製造方法 |
JP2016225455A (ja) * | 2015-05-29 | 2016-12-28 | 株式会社デンソー | 半導体装置およびその製造方法 |
CN107615492A (zh) * | 2015-05-29 | 2018-01-19 | 株式会社电装 | 半导体装置及其制造方法 |
CN107615492B (zh) * | 2015-05-29 | 2020-09-29 | 株式会社电装 | 半导体装置及其制造方法 |
US10418477B2 (en) | 2016-12-28 | 2019-09-17 | Fuji Electric Co., Ltd. | Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JP5817204B2 (ja) | 2015-11-18 |
US20120273801A1 (en) | 2012-11-01 |
US8525223B2 (en) | 2013-09-03 |
CN102760768B (zh) | 2016-01-13 |
CN102760768A (zh) | 2012-10-31 |
DE102012205879B4 (de) | 2016-05-12 |
DE102012205879A1 (de) | 2012-10-31 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6572423B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP5884617B2 (ja) | 炭化珪素半導体装置およびその製造方法 | |
JP5776610B2 (ja) | 炭化珪素半導体装置およびその製造方法 | |
EP2863417B1 (en) | Silicon carbide semiconductor device and method for producing same | |
US8354715B2 (en) | Semiconductor device and method of fabricating the same | |
JP6729523B2 (ja) | 炭化珪素半導体装置およびその製造方法 | |
JP2017092368A (ja) | 半導体装置および半導体装置の製造方法 | |
JP5817204B2 (ja) | 炭化珪素半導体装置 | |
CN111149213B (zh) | 碳化硅半导体装置及其制造方法 | |
US20060057796A1 (en) | Silicon carbide semiconductor device and its method of manufacturing method | |
US20110018004A1 (en) | Semiconductor device with large blocking voltage and manufacturing method thereof | |
JP2012169385A (ja) | 炭化珪素半導体装置 | |
JP6988175B2 (ja) | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 | |
JP2009302436A (ja) | 炭化珪素半導体装置の製造方法 | |
US20210384343A1 (en) | Silicon carbide semiconductor device and method for manufacturing same | |
JP6766512B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP6109444B1 (ja) | 半導体装置 | |
WO2014024469A1 (ja) | 炭化珪素半導体装置およびその製造方法 | |
JP2010021175A (ja) | 炭化珪素半導体装置およびその製造方法 | |
JP2012243966A (ja) | 半導体装置 | |
WO2018117061A1 (ja) | 半導体装置および半導体装置の製造方法 | |
JP2017152489A (ja) | 化合物半導体装置およびその製造方法 | |
WO2012172988A1 (ja) | 炭化珪素半導体装置及び炭化珪素半導体装置の製造方法 | |
JP6207627B2 (ja) | 半導体装置 | |
WO2015076020A1 (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20131002 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20140804 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140819 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20141017 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20141114 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20141117 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20150331 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20150612 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20150615 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20150901 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20150914 |
|
R151 | Written notification of patent or utility model registration |
Ref document number: 5817204 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R151 |