JP2012216773A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2012216773A5 JP2012216773A5 JP2012015679A JP2012015679A JP2012216773A5 JP 2012216773 A5 JP2012216773 A5 JP 2012216773A5 JP 2012015679 A JP2012015679 A JP 2012015679A JP 2012015679 A JP2012015679 A JP 2012015679A JP 2012216773 A5 JP2012216773 A5 JP 2012216773A5
- Authority
- JP
- Japan
- Prior art keywords
- layer
- copper
- wiring
- forming
- coupling agent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010949 copper Substances 0.000 claims description 33
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 32
- 229920005989 resin Polymers 0.000 claims description 23
- 239000011347 resin Substances 0.000 claims description 23
- 239000007822 coupling agent Substances 0.000 claims description 22
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 17
- 229910001128 Sn alloy Inorganic materials 0.000 claims description 17
- 229910052802 copper Inorganic materials 0.000 claims description 15
- 238000007747 plating Methods 0.000 claims description 14
- 239000002184 metal Substances 0.000 claims description 12
- 229910052751 metal Inorganic materials 0.000 claims description 12
- 239000000758 substrate Substances 0.000 claims description 9
- 238000000034 method Methods 0.000 claims description 7
- 239000006087 Silane Coupling Agent Substances 0.000 claims description 4
- -1 methacryloxy group Chemical group 0.000 claims description 4
- 125000000524 functional group Chemical group 0.000 claims description 3
- 125000003277 amino group Chemical group 0.000 claims description 2
- 125000001951 carbamoylamino group Chemical group C(N)(=O)N* 0.000 claims description 2
- 125000003700 epoxy group Chemical group 0.000 claims description 2
- IQPQWNKOIGAROB-UHFFFAOYSA-N isocyanate group Chemical group [N-]=C=O IQPQWNKOIGAROB-UHFFFAOYSA-N 0.000 claims description 2
- 125000000101 thioether group Chemical group 0.000 claims description 2
- 125000003396 thiol group Chemical group [H]S* 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims 8
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical class [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 claims 4
- 230000001681 protective effect Effects 0.000 claims 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims 2
- 238000009713 electroplating Methods 0.000 claims 1
- 238000005530 etching Methods 0.000 claims 1
- 238000010030 laminating Methods 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000007733 ion plating Methods 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2012015679A JP2012216773A (ja) | 2011-03-29 | 2012-01-27 | 配線基板及びその製造方法 |
| US13/433,680 US9040832B2 (en) | 2011-03-29 | 2012-03-29 | Wiring substrate and method of manufacturing the same |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011072694 | 2011-03-29 | ||
| JP2011072694 | 2011-03-29 | ||
| JP2012015679A JP2012216773A (ja) | 2011-03-29 | 2012-01-27 | 配線基板及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2012216773A JP2012216773A (ja) | 2012-11-08 |
| JP2012216773A5 true JP2012216773A5 (enExample) | 2015-01-22 |
Family
ID=46925753
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012015679A Pending JP2012216773A (ja) | 2011-03-29 | 2012-01-27 | 配線基板及びその製造方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US9040832B2 (enExample) |
| JP (1) | JP2012216773A (enExample) |
Families Citing this family (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5602584B2 (ja) * | 2010-10-28 | 2014-10-08 | 新光電気工業株式会社 | 配線基板及びその製造方法 |
| US8945990B2 (en) * | 2012-04-24 | 2015-02-03 | Infineon Technologies Ag | Chip package and method of forming the same |
| CN103717009A (zh) * | 2012-10-08 | 2014-04-09 | 苏州卓融水处理科技有限公司 | 一种无核封装基板种子层附着力的方法 |
| JP6322885B2 (ja) * | 2012-11-01 | 2018-05-16 | 味の素株式会社 | プリント配線板の製造方法 |
| JP2014154800A (ja) * | 2013-02-13 | 2014-08-25 | Shinko Electric Ind Co Ltd | 配線基板及びその製造方法 |
| US10475732B2 (en) * | 2013-07-12 | 2019-11-12 | Taiwan Semiconductor Manufacturing Co., Ltd. | 3DIC package integration for high-frequency RF system |
| JP6308007B2 (ja) * | 2013-07-16 | 2018-04-11 | ソニー株式会社 | 配線基板および配線基板の製造方法 |
| JP2015230901A (ja) * | 2014-06-03 | 2015-12-21 | 三菱瓦斯化学株式会社 | 樹脂積層体及びプリント配線板 |
| JP6324876B2 (ja) * | 2014-07-16 | 2018-05-16 | 新光電気工業株式会社 | 配線基板、半導体装置及び配線基板の製造方法 |
| JP6358887B2 (ja) * | 2014-07-31 | 2018-07-18 | 新光電気工業株式会社 | 支持体、配線基板及びその製造方法、半導体パッケージの製造方法 |
| KR101640909B1 (ko) * | 2014-09-16 | 2016-07-20 | 주식회사 모다이노칩 | 회로 보호 소자 및 그 제조 방법 |
| JP2017069399A (ja) * | 2015-09-30 | 2017-04-06 | 凸版印刷株式会社 | インターポーザ、半導体装置及び半導体装置の製造方法 |
| EP3386282A4 (en) | 2015-11-30 | 2019-07-17 | Toppan Printing Co., Ltd. | MULTILAYER FITTED PCB AND METHOD FOR THE MANUFACTURE THEREOF |
| WO2019171990A1 (ja) * | 2018-03-09 | 2019-09-12 | 株式会社有沢製作所 | 積層体及びその製造方法 |
| CN110010627B (zh) * | 2019-04-12 | 2021-02-02 | 京东方科技集团股份有限公司 | 一种阵列基板及其制作方法、显示装置 |
| JP2021097131A (ja) * | 2019-12-17 | 2021-06-24 | イビデン株式会社 | ドライフィルムレジスト、及び、プリント配線板の製造方法 |
| JP7310599B2 (ja) * | 2019-12-26 | 2023-07-19 | トヨタ自動車株式会社 | 配線基板の製造方法および配線基板 |
| US20230253215A1 (en) * | 2020-07-28 | 2023-08-10 | Resonac Corporation | Method for producing circuit board |
| US11973050B2 (en) | 2021-02-02 | 2024-04-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for forming an upper conductive structure having multilayer stack to decrease fabrication costs and increase performance |
| EP4319496A4 (en) * | 2021-03-22 | 2024-09-25 | Panasonic Intellectual Property Management Co., Ltd. | WIRING BODY, MOUNTING SUBSTRATE, WIRING TRANSFER BOARD WITH WIRING, INTERMEDIATE MATERIAL FOR WIRING BODY, MANUFACTURING METHOD FOR WIRING BODY AND MANUFACTURING METHOD FOR MOUNTING SUBSTRATE |
| EP4319510A4 (en) * | 2021-03-22 | 2024-10-02 | Panasonic Intellectual Property Management Co., Ltd. | WIRING BODY, MOUNTING SUBSTRATE, WIRING TRANSFER BOARD WITH WIRING, INTERMEDIATE MATERIAL FOR WIRING BODY, AND METHOD FOR MANUFACTURING WIRING BODY |
| WO2022201563A1 (ja) * | 2021-03-25 | 2022-09-29 | ナミックス株式会社 | 配線基板用積層体 |
| US20240237232A1 (en) * | 2023-01-09 | 2024-07-11 | Hannstar Display Corporation | Circuit board and manufacturing method thereof, and light emitting module |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6623844B2 (en) | 2001-02-26 | 2003-09-23 | Kyocera Corporation | Multi-layer wiring board and method of producing the same |
| JP3631682B2 (ja) | 2001-02-26 | 2005-03-23 | 京セラ株式会社 | 多層配線基板及びその製造方法 |
| EP2200413A4 (en) * | 2008-09-30 | 2011-12-14 | Ibiden Co Ltd | MULTI-LAYER PRINTED CIRCUIT BOARD AND METHOD FOR MANUFACTURING MULTI-LAYER PRINTED CIRCUIT BOARD |
| WO2010038532A1 (ja) * | 2008-09-30 | 2010-04-08 | イビデン株式会社 | 多層プリント配線板、及び、多層プリント配線板の製造方法 |
| KR101268145B1 (ko) * | 2008-10-27 | 2013-05-27 | 히타치가세이가부시끼가이샤 | 구리의 표면 처리 방법 및 구리 |
| JP2011049289A (ja) * | 2009-08-26 | 2011-03-10 | Kyocera Corp | 配線基板及びその製造方法 |
| US8450619B2 (en) * | 2010-01-07 | 2013-05-28 | International Business Machines Corporation | Current spreading in organic substrates |
-
2012
- 2012-01-27 JP JP2012015679A patent/JP2012216773A/ja active Pending
- 2012-03-29 US US13/433,680 patent/US9040832B2/en active Active
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN104143540B (zh) | 薄膜倒装结构、金属凸块结构与形成薄膜倒装结构的方法 | |
| TWI614815B (zh) | 可彎摺與伸展的電子裝置及方法 | |
| US9040832B2 (en) | Wiring substrate and method of manufacturing the same | |
| US10763133B2 (en) | Semiconductor structure and semiconductor package device using the same | |
| TWI660477B (zh) | 半導體封裝及其製造方法 | |
| CN101771013A (zh) | 半导体装置及其制造方法 | |
| US9451696B2 (en) | Embedded architecture using resin coated copper | |
| US20190066908A1 (en) | Electronic component | |
| US20190088582A1 (en) | Semiconductor device and method for manufacturing the same | |
| JP2017017238A5 (enExample) | ||
| CN104952741B (zh) | 柔性基板上的电气电路 | |
| JP2011100793A5 (ja) | 半導体パッケージ及びその製造方法 | |
| KR101043328B1 (ko) | 전자소자 내장형 인쇄회로기판 및 그 제조방법 | |
| US9520378B2 (en) | Thermal matched composite die | |
| KR20120122637A (ko) | 기판, 플립칩 패키지 및 그 제조방법 | |
| JP5982760B2 (ja) | 電子デバイス及びその製造方法 | |
| WO2003095712A3 (en) | Method of and apparatus for forming three-dimensional structures integral with semiconductor based circuitry | |
| US9707706B2 (en) | Flexible substrate embedded with wires and method for fabricating the same | |
| TW201110299A (en) | Multilayer semiconductor device and method for manufacturing multilayer semiconductor device | |
| US11705414B2 (en) | Structure and method for semiconductor packaging | |
| CN106954335A (zh) | 表面镀层和包括该表面镀层的半导体封装件 | |
| TW201601224A (zh) | 封裝基板結構及其製法 | |
| JP2018032790A (ja) | トランジスタおよびトランジスタの製造方法 | |
| US8067266B2 (en) | Methods for the fabrication of microelectronic device substrates by attaching two cores together during fabrication | |
| TWI520276B (zh) | 封裝基板及其製法 |